C8051F060_07 SILABS [Silicon Laboratories], C8051F060_07 Datasheet - Page 173

• Manufacturer Part Number: C8051F060_07
• Description: Mixed Signal ISP Flash MCU Family
• Manufacturer: SILABS [Silicon Laboratories]

15.2. External Oscillator Drive Circuit
The external oscillator circuit may drive an external crystal, ceramic resonator, capacitor, or RC network. A
CMOS clock may also provide a clock input. For a crystal or ceramic resonator configuration, the crystal/
resonator must be wired across the XTAL1 and XTAL2 pins as shown in Option 1 of Figure 15.1. In RC,
capacitor, or CMOS clock configuration, the clock source should be wired to the XTAL2 and/or XTAL1
pin(s) as shown in Option 2, 3, or 4 of Figure 15.1. The type of external oscillator must be selected in the
OSCXCN register, and the frequency control bits (XFCN) must be selected appropriately (see
Figure 15.5).
15.3. System Clock Selection
The CLKSL bit in register CLKSEL selects which oscillator generates the system clock. CLKSL must be
set to ‘1’ for the system clock to run from the external oscillator; however the external oscillator may still
clock peripherals (timers, PCA) when the internal oscillator is selected as the system clock. The system
clock may be switched on-the-fly between the internal and external oscillator, so long as the selected oscil-
lator is enabled and settled. The internal oscillator requires little start-up time, and may be enabled and
selected as the system clock in the same write to OSCICN. External crystals and ceramic resonators typi-
cally require a start-up time before they are settled and ready for use as the system clock. The Crystal
Valid Flag (XTLVLD in register OSCXCN) is set to ‘1’ by hardware when the external oscillator is settled. To
avoid reading a false XTLVLD, in crystal mode software should delay at least 1 ms between enabling the
external oscillator and checking XTLVLD. RC and C modes typically require no startup time.
-40°C to +85°C unles otherwise specified.
Calibrated Internal Oscillator
Frequency
Internal Oscillator Supply
Current (3.0V Supply)
Bits7-1:
Bit0:
R/W
Bit7
-
Parameter
Reserved.
CLKSL: System Clock Source Select Bit.
0: SYSCLK derived from the Internal Oscillator, and scaled as per the IFCN bits in OSCICN.
1: SYSCLK derived from the External Oscillator circuit.
R/W
Bit6
-
Table 15.1. Internal Oscillator Electrical Characteristics
Figure 15.4. CLKSEL: Oscillator Clock Selection Register
R/W
Bit5
-
OSCICN.7 = 1
R/W
Bit4
-
Conditions
Rev. 1.2
R/W
Bit3
-
C8051F060/1/2/3/4/5/6/7
R/W
Bit2
-
Min
24
R/W
Bit1
-
24.5
Typ
550
SFR Address:
CLKSL
SFR Page:
Max
R/W
Bit0
25
0x97
F
Reset Value
00000000
Units
MHz
µA
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