C8051F060_07 SILABS [Silicon Laboratories], C8051F060_07 Datasheet - Page 115

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C8051F060_07

Manufacturer Part Number
C8051F060_07
Description
Mixed Signal ISP Flash MCU Family
Manufacturer
SILABS [Silicon Laboratories]
Datasheet
11.
The internal voltage reference circuit consists of a 1.2 V, temperature stable bandgap voltage reference
generator and a gain-of-two output buffer amplifier. The internal reference may be routed to the VREF pin
as shown in Figure 11.1. The maximum load seen by the VREF pin must be less than 200 µA to AGND.
Bypass capacitors of 0.1 µF and 4.7 µF are recommended from the VREF pin to AGND, as shown in
Figure 11.1.
The Reference Control Register 2, REF2CN (defined in Figure 11.2) enables/disables the internal refer-
ence generator. The BIASE bit in REF2CN enables the on-board reference generator while the REFBE bit
enables the gain-of-two buffer amplifier which drives the VREF pin. When disabled, the supply current
drawn by the bandgap and buffer amplifier falls to less than 1 µA (typical) and the output of the buffer
amplifier enters a high impedance state. If the internal bandgap is used as the reference voltage generator,
BIASE and REFBE must both be set to logic 1. If the internal reference is not used, REFBE may be set to
logic 0. The electrical specifications for the Voltage Reference are given in Table 11.1.
Voltage Reference 2 (C8051F064/5/6/7)
External
Circuitry
Figure 11.1. Voltage Reference Functional Block Diagram
Recommended Bypass
4.7µF
Capacitors
+
0.1µF
Rev. 1.2
VREF
C8051F060/1/2/3/4/5/6/7
REFBE
x2
Band-Gap
BIASE
1.2V
EN
115

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