C8051F060_07 SILABS [Silicon Laboratories], C8051F060_07 Datasheet - Page 56

• Manufacturer Part Number: C8051F060_07
• Description: Mixed Signal ISP Flash MCU Family
• Manufacturer: SILABS [Silicon Laboratories]

C8051F060/1/2/3/4/5/6/7
5.3.3. Settling Time Requirements
The ADC requires a minimum tracking time before an accurate conversion can be performed. This tracking
time is determined by the ADC input resistance, the ADC sampling capacitance, any external source resis-
tance, and the accuracy required for the conversion. Figure 5.5 shows the equivalent ADC input circuits for
both Differential and Single-ended modes. Notice that the equivalent time constant for both input circuits is
the same. The required settling time for a given settling accuracy (SA) may be approximated by
Equation 5.1. An absolute minimum tracking time of 280 ns is required prior to the start of a conversion.
Where:
SA is the settling accuracy, given as a fraction of an LSB (for example, 0.25 to settle within 1/4 LSB)
t is the required settling time in seconds
R
n is the ADC resolution in bits (16).
56
TOTAL
AIN0
AIN1
is the sum of the ADC input resistance and any external source resistance.
RC
Differential Mode
Input
= R
AIN
R
R
* C
AIN
AIN
SAMPLE
= 30
= 30
Figure 5.5. ADC0 and ADC1 Equivalent Input Circuits
Equation 5.1. ADC0 Settling Time Requirements
Ω
Ω
t
C
C
SAMPLE
SAMPLE
=
ln
= 80pF
= 80pF


------ -
SA
2
n


Rev. 1.2
×
R
TOTAL
AIN0
AIN1
C
or
SAMPLE
Single-Ended Mode
RC
Input
= R
AIN
R
* C
AIN
SAMPLE
= 30
Ω
C
SAMPLE
= 80pF