C8051F060_07 SILABS [Silicon Laboratories], C8051F060_07 Datasheet - Page 43

• Manufacturer Part Number: C8051F060_07
• Description: Mixed Signal ISP Flash MCU Family
• Manufacturer: SILABS [Silicon Laboratories]

P7.0/AD0m/
P7.1/AD1m/
P6.2/A10m/
P6.4/A12m/
P6.5/A13m/
P6.6/A14m/
P6.7/A15m/
P6.3/A11m/
P6.0/A8m/
P6.1/A9m/
P5.2/A10
P5.4/A12
P5.5/A13
P5.6/A14
P5.7/A15
P5.3/A11
Name
D0
D1
A0
A1
A2
A3
A4
A5
A6
A7
F060
F062
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
Pin Numbers
F061
F063
F064
F066
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
Table 4.1. Pin Definitions (Continued)
F065
F067
D I/O Port 5.2. See Port Input/Output section for complete
D I/O Port 5.3. See Port Input/Output section for complete
D I/O Port 5.4. See Port Input/Output section for complete
D I/O Port 5.5. See Port Input/Output section for complete
D I/O Port 5.6. See Port Input/Output section for complete
D I/O Port 5.7. See Port Input/Output section for complete
D I/O Port 6.0. See Port Input/Output section for complete
D I/O Port 6.1. See Port Input/Output section for complete
D I/O Port 6.2. See Port Input/Output section for complete
D I/O Port 6.3. See Port Input/Output section for complete
D I/O Port 6.4. See Port Input/Output section for complete
D I/O Port 6.5. See Port Input/Output section for complete
D I/O Port 6.6. See Port Input/Output section for complete
D I/O Port 6.7. See Port Input/Output section for complete
D I/O Port 7.0. See Port Input/Output section for complete
D I/O Port 7.1. See Port Input/Output section for complete
Type Description
Rev. 1.2
description.
description.
description.
description.
description.
description.
description.
Bit 8 External Memory Address Bus (Multiplexed
mode).
Bit 0 External Memory Address Bus (Non-multi-
plexed mode).
description.
description.
description.
description.
description.
description.
description.
description.
Bit 0 External Memory Address/Data Bus (Multi-
plexed mode).
Bit 0 External Memory Data Bus (Non-multiplexed
mode).
description.
C8051F060/1/2/3/4/5/6/7
43