C8051F060_07 SILABS [Silicon Laboratories], C8051F060_07 Datasheet - Page 83

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C8051F060_07

Manufacturer Part Number
C8051F060_07
Description
Mixed Signal ISP Flash MCU Family
Manufacturer
SILABS [Silicon Laboratories]
Datasheet
Bits 7-6: Unused.
Bits 5-0: DMA0 instruction address to begin with when executing DMA instructions.
Bits 7-6: Unused.
Bits 5-0: Contains the address of the current DMA0 Instruction to be executed.
SFR Page:
SFR Address:
SFR Page:
SFR Address:
R/W
R/W
Bit7
Bit7
-
-
3
0xFD
3
0xFE
R/W
R/W
Bit6
Bit6
-
-
Figure 6.8. DMA0BND: DMA0 Instruction Boundary Register
Figure 6.9. DMA0ISW: DMA0 Instruction Status Register
R/W
R/W
Bit5
Bit5
R/W
R/W
Bit4
Bit4
Rev. 1.2
R/W
R/W
Bit3
Bit3
C8051F060/1/2/3/4/5/6/7
R/W
R/W
Bit2
Bit2
R/W
R/W
Bit1
Bit1
R/W
R/W
Bit0
Bit0
Reset Value
Reset Value
00000000
00000000
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