C8051F060_07 SILABS [Silicon Laboratories], C8051F060_07 Datasheet - Page 38

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C8051F060_07

Manufacturer Part Number
C8051F060_07
Description
Mixed Signal ISP Flash MCU Family
Manufacturer
SILABS [Silicon Laboratories]
Datasheet
C8051F060/1/2/3/4/5/6/7
3.
38
-40 to +85 °C, 25 MHz System Clock unless otherwise specified.
Analog Supply Voltage (AV+,
AVDD)
Digital Supply Voltage (VDD)
Analog-to-Digital Supply Delta
(|VDD - AV+| or |VDD - AVDD|)
Supply Current from Analog
Peripherals (active)
Supply Current from Analog
Peripherals (inactive)
Supply Current from CPU and
Digital Peripherals (CPU active)
(Note 3)
Supply Current from CPU and
Digital Peripherals (CPU inac-
tive, not accessing Flash)
(Note 3)
Supply Current with all systems
shut down
VDD Supply RAM Data Reten-
tion Voltage
SYSCLK (System Clock)
Specified Operating Tempera-
ture Range
Note 1: Analog Supply AV+ must be greater than 1 V for VDD monitor to operate.
Note 2: Internal Oscillator and VDD Monitor current not included. Individual supply current contributions
for each peripheral are listed in the chapter.
Note 3: Current increases linearly with supply Voltage.
Note 4: SYSCLK must be at least 32 kHz to enable debugging.
Global DC Electrical Characteristics
Parameter
Table 3.1. Global DC Electrical Characteristics
(Note 1)
Internal REF, ADC, DAC, Com-
parators all enabled. (Note 2)
Internal REF, ADC, DAC, Com-
parators all disabled, oscillator
disabled.
VDD=2.7 V, Clock=25 MHz
VDD=2.7 V, Clock=1 MHz
VDD=2.7 V, Clock=32 kHz
VDD=3.0 V, Clock=25 MHz
VDD=3.0 V, Clock=1 MHz
VDD=3.0 V, Clock=32 kHz
VDD=2.7 V, Clock=25 MHz
VDD=2.7 V, Clock=1 MHz
VDD=2.7 V, Clock=32 kHz
VDD=3.0 V, Clock=25 MHz
VDD=3.0 V, Clock=1 MHz
VDD=3.0 V, Clock=32 kHz
Oscillator not running
(Note 4)
Conditions
Rev. 1.2
Min
-40
2.7
2.7
0
Typ
0.2
3.0
3.0
0.2
0.7
1.0
0.5
0.8
1.5
14
18
30
20
35
13
20
16
23
Max
+85
3.6
3.6
0.5
25
Units
MHz
mA
mA
mA
mA
mA
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
°C
V
V
V
V

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