C8051F060_07 SILABS [Silicon Laboratories], C8051F060_07 Datasheet - Page 74

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C8051F060_07

Manufacturer Part Number
C8051F060_07
Description
Mixed Signal ISP Flash MCU Family
Manufacturer
SILABS [Silicon Laboratories]
Datasheet
C8051F060/1/2/3/4/5/6/7
74
VDD = 3.0 V, AV+ = 3.0 V, AVDD = 3.0 V, VREF = 2.50 V (REFBE=0), -40 to +85 °C unless otherwise
specified
Parameter
Operating Input Range
Power Specifications
Power Supply Current (each
ADC)
Power Supply Rejection
VDD = 3.0 V, AV+ = 3.0 V, AVDD = 3.0 V, -40 to +85 °C unless otherwise specified
Parameter
Internal Reference
Output Voltage
VREF Temperature Coefficient
Power Supply Current (each
Voltage Reference)
External Reference
Input Voltage Range
Input Current
Table 5.2. 16-Bit ADC0 and ADC1 Electrical Characteristics (Continued)
Table 5.3. Voltage Reference 0 and 1 Electrical Characteristics
Conditions
AIN0 or AIN1
AIN0G or AIN1G (DC Only)
Operating Mode, 1 Msps
AV+
AVDD
Shutdown Mode
VDD ± 5%
Conditions
25 °C ambient
AV+
ADC throughput = 1 Msps
Rev. 1.2
Min
2.36
2.0
Min
-0.2
-0.2
Typ
2.43
Typ
450
1.5
15
±0.5
4.0
2.0
<1
Max
Max
AV+
0.6
2.48
AV+
Units
Units
LSB
mA
mA
ppm/°C
µA
V
V
mA
µA
V
V

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