S34ML02G100BHI003 Spansion, S34ML02G100BHI003 Datasheet - Page 19

• Manufacturer Part Number: S34ML02G100BHI003
• Description: Flash 2G, 3V, 25ns NAND Flash
• Manufacturer: Spansion

Specifications of S34ML02G100BHI003

• Rohs: yes
• Data Bus Width: 1 bit
• Memory Type: NAND Flash
• Memory Size: 2 Gbit
• Architecture: Sectored
• Timing Type: Asynchronous
• Access Time: 25 ns
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Maximum Operating Current: 40 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: BGA-63
• Organization: 2048 B x 8, 2048 B x 16

2.3
2.4
2.5
2.6
March 7, 2013 S34ML01G1_04G1_15
Data Input
Data Output
Write Protect
Standby
The Data Input bus operation allows the data to be programmed to be sent to the device. The data insertion is
serial and timed by the Write Enable cycles. Data is accepted only with Chip Enable low, Address Latch
Enable low, Command Latch Enable low, Read Enable high, and Write Protect high and latched on the rising
edge of Write Enable. See
requirements.
The Data Output bus operation allows data to be read from the memory array and to check the Status
Register content, the EDC register content, and the ID data. Data can be serially shifted out by toggling the
Read Enable pin with Chip Enable low, Write Enable high, Address Latch Enable low, and Command Latch
Enable low. See
requirements.
The Hardware Write Protection is activated when the Write Protect pin is low. In this condition, modify
operations do not start and the content of the memory is not altered. The Write Protect pin is not latched by
Write Enable to ensure the protection even during power up.
In Standby, the device is deselected, outputs are disabled, and power consumption is reduced.
Figure 6.4 on page 45
D a t a
Figure 6.3 on page 44
Spansion
S h e e t
®
SLC NAND Flash Memory for Embedded
to
Figure 6.23
and
Table 5.4 on page 41
and
Table 5.4 on page 41
for details of the timing
for details of the timings
19