S34ML02G100BHI003 Spansion, S34ML02G100BHI003 Datasheet - Page 54

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S34ML02G100BHI003

Manufacturer Part Number
S34ML02G100BHI003
Description
Flash 2G, 3V, 25ns NAND Flash
Manufacturer
Spansion
Datasheet

Specifications of S34ML02G100BHI003

Rohs
yes
Data Bus Width
1 bit
Memory Type
NAND Flash
Memory Size
2 Gbit
Architecture
Sectored
Timing Type
Asynchronous
Access Time
25 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
Maximum Operating Current
40 mA
Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
BGA-63
Organization
2048 B x 8, 2048 B x 16
6.19
54
Read Status Cycle Timing
Notes:
1. C1A-C2A Column address for page A. C1A is the least significant byte.
2. R1A-R3A Row address for page A. R1A is the least significant byte.
3. C1B-C2B Column address for page B. C1B is the least significant byte.
4. R1B-R3B Row address for page B. R1B is the least significant byte.
5. The block address bits must be the same except for the bit(s) that select the plane.
WE#
SR[6]
CLE
ALE
RE#
IOx
WE#
CLE
CE#
RE#
I/Ox
Spansion
85h
C1
A
Figure 6.21 Multiplane Copy Back Program (ONFI 1.0 Protocol)
®
C2
SLC NAND Flash Memory for Embedded
A
R1
A
R2
A
Figure 6.22 Status / EDC Read Cycle
R3
A
tCLS
t
CS
70h or 7Bh
11h
t
t
WP
DS
D a t a
t
t
t
CLH
CH
DH
t IPBSY
S h e e t
t
WHR
t
CLR
85h
t
IR
C1
B
t
CEA
C2
t
B
REA
S34ML01G1_04G1_15 March 7, 2013
R1
B
Status Output
R2
B
R3
t
B
RHOH
t
t
RHZ
t
COH
CHZ
10h
t PROG
A

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