S34ML02G100BHI003 Spansion, S34ML02G100BHI003 Datasheet - Page 50

no-image

S34ML02G100BHI003

Manufacturer Part Number
S34ML02G100BHI003
Description
Flash 2G, 3V, 25ns NAND Flash
Manufacturer
Spansion
Datasheet

Specifications of S34ML02G100BHI003

Rohs
yes
Data Bus Width
1 bit
Memory Type
NAND Flash
Memory Size
2 Gbit
Architecture
Sectored
Timing Type
Asynchronous
Access Time
25 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
Maximum Operating Current
40 mA
Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
BGA-63
Organization
2048 B x 8, 2048 B x 16
6.14
50
Block Erase Operation
Notes:
1. C1A-C2A Column address for page A. C1A is the least significant byte.
2. R1A-R3A Row address for page A. R1A is the least significant byte.
3. D0A-DnA Data to program for page A.
4. C1B-C2B Column address for page B. C1B is the least significant byte.
5. R1B-R3B Row address for page B. R1B is the least significant byte.
6. D0B-DnB Data to program for page B.
7. The block address bits must be the same except for the bit(s) that select the plane.
Cycle Type
Cycle Type
R/B#
WE#
CLE
CE#
RE#
ALE
I/Ox
DQx
SR[6]
DQx
SR[6]
Auto Block Erase
Setup Command
A
Spansion
60h
CMD ADDR ADDR
CMD ADDR ADDR
80h
80h
tWC
Row Add1 Row Add2 Row Add3
®
C1
C1
SLC NAND Flash Memory for Embedded
Figure 6.14 Multiplane Page Program (ONFI 1.0 Protocol)
Row Address
A
B
Figure 6.15 Block Erase Operation (Erase One Block)
C2
C2
B
A
ADDR
ADDR
R1
R1
A
B
Erase Command
ADDR
ADDR
R2
R2
D a t a
D0h
B
A
ADDR
ADDR
R3
R3
tWB
A
B
S h e e t
tADL
tADL
BUSY
tBERS
DIN
DIN
D0
D0
B
A
D1B
DIN
DIN
D1
A
A
S34ML01G1_04G1_15 March 7, 2013
DIN
DIN
Read Status
Command
...
...
70h
tWHR
DIN
DIN
Dn
Dn
A
B
I/O0=0 Successful Erase
I/O0=1 Error in Erase
I/O0
CMD
CMD
11h
10h
tADL
tADL
tIPBSY
tPROG

Related parts for S34ML02G100BHI003