S34ML02G100BHI003 Spansion, S34ML02G100BHI003 Datasheet - Page 35

• Manufacturer Part Number: S34ML02G100BHI003
• Description: Flash 2G, 3V, 25ns NAND Flash
• Manufacturer: Spansion

Specifications of S34ML02G100BHI003

• Rohs: yes
• Data Bus Width: 1 bit
• Memory Type: NAND Flash
• Memory Size: 2 Gbit
• Architecture: Sectored
• Timing Type: Asynchronous
• Access Time: 25 ns
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Maximum Operating Current: 40 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: BGA-63
• Organization: 2048 B x 8, 2048 B x 16

3.19
March 7, 2013 S34ML01G1_04G1_15
Read Parameter Page
The device supports the ONFI Read Parameter Page operation, initiated by writing ECh to the command
register, followed by an address input of 00h. The host must monitor the R/B# pin or wait for the maximum
data transfer time (t
Page mode until further commands are issued to it.
while
For x16 devices, the upper eight I/Os are not used and are 0xFF.
10-31
32-43
44-63
65-66
67-79
80-83
84-85
86-89
90-91
92-95
Byte
0-3
4-5
6-7
8-9
64
Table 3.12
O/M
M
M
M
M
M
M
M
O
M
M
M
M
M
explains the parameter fields.
Reserved (0)
Device model (20 ASCII characters)
JEDEC manufacturer ID
Reserved (0)
Parameter page signature
Revision number
Features supported
Optional commands supported
Device manufacturer (12 ASCII characters)
Date code
Number of data bytes per page
Number of spare bytes per page
Number of data bytes per partial page
Number of spare bytes per partial page
Number of pages per block
R
) before reading the Parameter Page data. The command register remains in Parameter
Byte 0: 4Fh, “O”
Byte 1: 4Eh, “N”
Byte 2: 46h, “F”
Byte 3: 49h, “I”
2-15
1
0
5-15
4
3
2
1
0
6-15
5
4
3
2
1
0
D a t a
Table 3.12 Parameter Page Description (Sheet 1 of 3)
Spansion
Reserved (0)
1 = supports ONFI version 1.0
Reserved (0)
Reserved (0)
1 = supports odd to even page Copyback
1 = supports interleaved operations
1 = supports non-sequential page programming
1 = supports multiple LUN operations
1 = supports 16-bit data bus width
Reserved (0)
1 = supports Read Unique ID
1 = supports Copyback
1 = supports Read Status Enhanced
1 = supports Get Features and Set Features
1 = supports Read Cache commands
1 = supports Page Cache Program command
S h e e t
®
Revision Information and Features Block
SLC NAND Flash Memory for Embedded
Manufacturer Information Block
Memory Organization Block
Description
Figure 6.37 on page 62
shows the operation sequence,
4Fh, 4Eh, 46h, 49h
02h, 00h
S34ML01G100 (x8): 14h, 00h
S34ML02G100 (x8): 1Ch, 00h
S34ML04G100 (x8): 1Ch, 00h
S34ML01G104 (x16): 15h, 00h
S34ML02G104 (x16): 1Dh, 00h
S34ML04G104 (x16): 1Dh, 00h
S34ML01G1: 12h, 00h
S34ML02G1: 1Bh, 00h
S34ML04G1: 1Bh, 00h
00h
53h, 50h, 41h, 4Eh, 53h, 49h,
4Fh, 4Eh, 20h, 20h, 20h, 20h
S34ML01G1: 53h, 33h, 34h,
4Dh, 4Ch, 30h, 31h, 47h, 31h,
20h, 20h, 20h, 20h, 20h, 20h,
20h, 20h, 20h, 20h, 20h
S34ML02G1: 53h, 33h, 34h,
4Dh, 4Ch, 30h, 32h, 47h, 31h,
20h, 20h, 20h, 20h, 20h, 20h,
20h, 20h, 20h, 20h, 20h
S34ML04G1: 53h, 33h, 34h,
4Dh, 4Ch, 30h, 34h, 47h, 31h,
20h, 20h, 20h, 20h, 20h, 20h,
20h, 20h, 20h, 20h, 20h
01h
00h
00h
00h, 08h, 00h, 00h
40h, 00h
00h, 02h, 00h, 00h
10h, 00h
40h, 00h, 00h, 00h
Values
35