S34ML02G100BHI003 Spansion, S34ML02G100BHI003 Datasheet - Page 51

• Manufacturer Part Number: S34ML02G100BHI003
• Description: Flash 2G, 3V, 25ns NAND Flash
• Manufacturer: Spansion

Specifications of S34ML02G100BHI003

• Rohs: yes
• Data Bus Width: 1 bit
• Memory Type: NAND Flash
• Memory Size: 2 Gbit
• Architecture: Sectored
• Timing Type: Asynchronous
• Access Time: 25 ns
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Maximum Operating Current: 40 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: BGA-63
• Organization: 2048 B x 8, 2048 B x 16

6.15
March 7, 2013 S34ML01G1_04G1_15
Multiplane Block Erase — S34ML02G1 and S34ML04G1
Note:
1. A18 is the plane address bit for x8 devices. A17 is the plane address bit for x16 devices.
Notes:
1. R1A-R3A Row address for block on plane 0. R1A is the least significant byte.
2. R1B-R3B Row address for block on plane 1. R1B is the least significant byte.
3. The block address bits must be the same except for the bit(s) that select the plane.
WE#
SR[6]
CLE
RE#
ALE
IOx
WE#
R/B#
CLE
CE#
ALE
RE#
I/Ox
I/O0~7
R/B#
Ex.) Address Restriction for Two-Plane Block Erase Operation
Block Erase Setup Command1
60h
60h
tWC
60h
Row Add1
R1
A12 ~ A17 : Fixed ‘Low’
A18
A19 ~ A28 : Fixed ‘Low’
A
Row Add1,2,3
Address
Row Address
R2
Row Add2
D a t a
: Fixed ‘Low’
A
Figure 6.17 Multiplane Block Erase (ONFI 1.0 Protocol)
Spansion
R3
A
R
o
w
A
6
D1h
Block Erase Setup Command2
d
h 0
3 d
S h e e t
A12 ~ A17 : Fixed ‘Low’
A18
A19 ~ A28 : Valid
Figure 6.16 Multiplane Block Erase
®
Row Add1,2,3
SLC NAND Flash Memory for Embedded
Address
tWC
6
t
h 0
IEBSY
: Fixed ‘High’
Row Add1
Row Address
D0h
Row Add2
60h
R1
R
Erase Confirm Command
o
w
B
A
d
3 d
R2
B
D
h 0
R3
B
tWB
D0h
7
h 0
tBERS
Busy
t
Read Status Command
BERS
70h
tWHR
I/O 1 = 0 Successful Erase
I/O 1 = 1 Error in plane
I/O0
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