S34ML02G100BHI003 Spansion, S34ML02G100BHI003 Datasheet - Page 26

• Manufacturer Part Number: S34ML02G100BHI003
• Description: Flash 2G, 3V, 25ns NAND Flash
• Manufacturer: Spansion

Specifications of S34ML02G100BHI003

• Rohs: yes
• Data Bus Width: 1 bit
• Memory Type: NAND Flash
• Memory Size: 2 Gbit
• Architecture: Sectored
• Timing Type: Asynchronous
• Access Time: 25 ns
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Maximum Operating Current: 40 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: BGA-63
• Organization: 2048 B x 8, 2048 B x 16

3.8
26
3.7.1
3.7.2
EDC Operation — S34ML02G1 and S34ML04G1
Multiplane Copy Back Program — S34ML02G1 and S34ML04G1
Special Read for Copy Back — S34ML02G1 and S34ML04G1
The device supports Multiplane Copy Back Program with exactly the same sequence and limitations as the
Page Program. Multiplane Copy Back Program must be preceded by two single page Copy Back Read
command sequences (1st page must be read from the 1st plane and 2nd page from the 2nd plane).
Multiplane Copy Back cannot cross plane boundaries — the contents of the source page of one device plane
can be copied only to a destination page of the same plane. EDC check is available also for Multiplane Copy
Back Program only for S34ML02G1 and S34ML04G1.
When “EDC check” is used in copy back, it must comply with some limitations related to data handling during
one Multiplane Copy Back Program sequence. Please refer to
operation. The Multiplane Copy Back Program sequence represented in
legacy protocol. In this case, the block address bits for the first plane are all zero and the second address
issued selects the block for both planes.
protocol. For both addresses issued in this protocol, the block address bits must be the same except for the
bit(s) that select the plane.
If a Multiplane Copy Back Program operation is interrupted by hardware reset, power failure or other means,
the host must ensure that the interrupted pages are not used for further reading or programming operations
until the next uninterrupted block erases are complete for the applicable blocks.
The device features the “Special Read for Copy Back.” If Copy Back Read (described in
Section 3.7.1 on page
page(s) will be executed with an increased internal (V
This special feature is used in order to minimize the number of read errors due to over-program or read
disturb — it shall be used only if ECC read errors have occurred in the source page using Page Read or Copy
Back Read sequences.
Excluding the Copy Back Read confirm command, all other features described in
Section 3.7.1
Error Detection Code check is a feature that can be used during the copy back operation (both single and
multiplane) to detect single bit errors occurring in the source page(s).
Note: The S34ML01G1 device does not support EDC.
 EDC check allows detection of up to 1 single bit error every 528 bytes, where each 528 byte group is
 In the x16 device, EDC allows detection of up to 1 single bit error every 264 words, where each 264 word
EDC results can be checked through a specific Read EDC register command, available only after issuing a
Copy Back Program or a Multiplane Copy Back Program. The EDC register can be queried during the copy
back program busy time (t
For the “EDC check” feature to operate correctly, specific conditions on data input handling apply for program
operations.
For the case of Page Program, Multiplane Page Program, Page Reprogram, Multiplane Page Reprogram,
Cache Program, and Multiplane Cache Program operations:
 In
 “Random Data Input” in a given EDC unit can be executed several times during one page program
composed of 512 bytes of main array and 16 bytes of spare area (see
on page
group is composed by 256 words of main array and 8 words of spare area see
on page
is allowed within the same page. In case this feature is used, the number of partial program operations
occurring in the same EDC unit must not exceed 1. In other words, page program operations must be
performed on the whole page, or on whole EDC unit at a time.
sequence, but data cannot be written to any column address more than once before the program is
initiated.
Section 3.2 on page 21
28). The described 528-byte area is called an “EDC unit.”
28). The described 264-word area is called “EDC
Spansion
for standard copy back remain valid (including the figures referred to in those sections).
26) is triggered with confirm command ‘36h’ instead ‘35h’, Copy Back Read from target
®
SLC NAND Flash Memory for Embedded
PROG
it was explained that a number of consecutive partial program operations (NOP)
).
Figure 6.21 on page 54
D a t a
PASS
S h e e t
) voltage.
unit.”
Section 3.8 on page 26
describes the sequences using the ONFI
Figure 6.20 on page 53
Table 3.3
S34ML01G1_04G1_15 March 7, 2013
Section 3.7
Table 3.3
and
for details on EDC
Table 3.4
Section 3.7
and
and
Table 3.4
shows the
and