COP8SA-DM National Semiconductor, COP8SA-DM Datasheet - Page 121

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COP8SA-DM

Manufacturer Part Number
COP8SA-DM
Description
MODULE DEBUGGING FOR COP8SA
Manufacturer
National Semiconductor
Datasheet

Specifications of COP8SA-DM

Module/board Type
Debugger Module
For Use With/related Products
Cop 8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*COP8SA-DM
Syntax:
Description:
Operation:
JMPL ADDR
Instruction
JMPL ADDR
The JMPL instruction allows branching to anywhere in the 32-Kbyte
program memory space. The values found in the second and third bytes
of the instruction are transferred to PCU (Upper 7 bits of PC) and PCL
(Lower 8 bits of PC) respectively. The program then jumps to the pro-
gram memory location accessed by PC.
PC14-8 <- HIADDR (SECOND BYTE OF INSTRUCTION)
PC7-0 <- LOADDR (THIRD BYTE OF INSTRUCTION)
Addressing Mode
Absolute
Instruction
Cycles
4
COP8SAx7 MICROCONTROLLER
Bytes
3
Hex Op Code
AC/HIADDR/
LOADDR
2-83

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