COP8SA-DM National Semiconductor, COP8SA-DM Datasheet - Page 87

• Manufacturer Part Number: COP8SA-DM
• Description: MODULE DEBUGGING FOR COP8SA
• Manufacturer: National Semiconductor

Specifications of COP8SA-DM

• Module/board Type: Debugger Module
• For Use With/related Products: Cop 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *COP8SA-DM

MICROWIRE/PLUS Slave Mode Operation
In the MICROWIRE/PLUS Slave mode of operation the SK clock is generated by an
external source. Setting the MSEL bit in the CNTRL register enables the SO and SK
functions onto the G Port. The SK pin must be selected as an input and the SO pin is
selected as an output pin by setting and resetting the appropriate bits in the Port G
configuration register. Table 2-10 summarizes the settings required to enter the Slave
mode of operation.
The user must set the BUSY flag immediately upon entering the Slave mode. This
ensures that all data bits sent by the Master is shifted properly. After eight clock pulses
the BUSY flag is clear, the shift clock is stopped, and the sequence may be repeated.
Alternate SK Phase Operation and SK Idle Polarity
The device allows either the normal SK clock or an alternate phase SK clock to shift data
in and out of the SIO register. In both the modes the SK idle polarity can be either high
or low. The polarity is selected by bit 5 of Port G data register. In the normal mode data
is shifted in on the rising edge of the SK clock and the data is shifted out on the falling
edge of the SK clock. The SIO register is shifted on each falling edge of the SK clock. In
the alternate SK phase operation, data is shifted in on the falling edge of the SK clock
and shifted out on the rising edge of the SK clock. Bit 6 of Port G configuration register
selects the SK edge.
A control flag, SKSEL, allows either the normal SK clock or the alternate SK clock to be
selected. Resetting SKSEL causes the MICROWIRE/PLUS logic to be clocked from the
normal SK signal. Setting the SKSEL flag selects the alternate SK clock. The SKSEL is
mapped into the G6 configuration bit. The SKSEL flag will power up in the reset
condition, selecting the normal SK signal.
This table assumes that the control flag MSEL is set.
Config. Bit
G4 (SO)
1
0
1
0
Config. Bit
G5 (SK)
1
1
0
0
SO
TRI-STATE
SO
TRI-STATE
Fun.
G4
Fun.
Int.
SK
Int.
SK
Ext.
SK
Ext.
SK
COP8SAx7 MICROCONTROLLER
G5
MICROWIRE/PLUS
Master
MICROWIRE/PLUS
Master
MICROWIRE/PLUS
Slave
MICROWIRE/PLUS
Slave
Operation
2-49