COP8SA-DM National Semiconductor, COP8SA-DM Datasheet - Page 152

• Manufacturer Part Number: COP8SA-DM
• Description: MODULE DEBUGGING FOR COP8SA
• Manufacturer: National Semiconductor

Specifications of COP8SA-DM

• Module/board Type: Debugger Module
• For Use With/related Products: Cop 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *COP8SA-DM

2-114
ADD
ADC
SUBC
AND
ANDSZ
OR
XOR
IFEQ
IFEQ
IFNE
IFGT
IFBNE
DRSZ
SBIT
RBIT
IFBIT
RPND
X
X
LD
LD
LD
LD
LD
X
X
LD
LD
LD
CLR
INC
DEC
LAID
DCOR
RRC
RLC
SWAP
SC
RC
IFC
IFNC
POP
PUSH
VIS
JMPL
JMP
JP
JSRL
JSR
JID
RET
RETSK
RETI
INTR
NOP
COP8SAx7 MICROCONTROLLER
A,Meml
A,Meml
A,Meml
A,Meml
A,Imm
A,Meml
A,Meml
MD,Imm
A,Meml
A,Meml
A,Meml
#
Reg
#,Mem
#,Mem
#,Mem
A,Mem
A,[X]
A,Meml
A,[X]
B,Imm
Mem,Imm
Reg,Imm
A, [B ]
A, [X ]
A, [B ]
A, [X ]
[B ],Imm
A
A
A
A
A
A
A
A
A
Addr.
Addr.
Disp.
Addr.
Addr
ADD
ADD with Carry
Subtract with Carry
Logical AND
Logical AND Immed., Skip if Zero
Logical OR
Logical EXclusive OR
IF EQual
IF EQual
IF Not Equal
IF Greater Than
If B Not Equal
Decrement Reg., Skip if Zero
Set BIT
Reset BIT
IF BIT
Reset PeNDing Flag
EXchange A with Memory
EXchange A with Memory [X]
LoaD A with Memory
LoaD A with Memory [X]
LoaD B with Immed.
LoaD Memory Immed
LoaD Register Memory Immed.
EXchange A with Memory [B]
EXchange A with Memory [X]
LoaD A with Memory [B]
LoaD A with Memory [X]
LoaD Memory [B] Immed.
CLeaR A
INCrement A
DECrement A
Load A InDirect from ROM
Decimal CORrect A
Rotate A Right thru C
Rotate A Left thru C
SWAP nibbles of A
Set C
Reset C
IF C
IF Not C
POP the stack into A
PUSH A onto the stack
Vector to Interrupt Service Routine
Jump absolute Long
Jump absolute
Jump relative short
Jump SubRoutine Long
Jump SubRoutine
Jump InDirect
RETurn from subroutine
RETurn and SKip
RETurn from Interrupt
Generate an Interrupt
No OPeration
A
A
A
A
Skip next if (A and Imm) = 0
A
A
Compare MD and Imm, Do next if MD = Imm
Compare A and Meml, Do next if A = Meml
Compare A and Meml, Do next if A
Compare A and Meml, Do next if A > Meml
Do next if lower 4 bits of B
Reg
1 to bit, Mem (bit = 0 to 7 immediate)
0 to bit, Mem
If bit #,A or Mem is true do next instruction
Reset Software Interrupt Pending Flag
A
A
A
A
B
Mem
Reg
A
A
A
A
[B]
A
A
A
A
A
C
C
A7...A4
C
C
IF C is true, do next instruction
If C is not true, do next instruction
SP
[SP]
PU
PC
PC9...0
PC
[SP]
[SP]
PL
SP + 2, PL
SP + 2, PL
SP + 2, PL
[SP]
PC
ROM (PU,A)
A + Meml
A + Meml + C, C
A - MemI + C, C
A and Meml
A or Meml
A xor Meml
Meml
[X]
Imm
[B], (B
[X], (X
0
A + 1
A - 1
ROM (PU,A)
BCD correction of A (follows ADC, SUBC)
Mem
[X]
[B], (B
[X], (X
A7
A7
1, HC
0, HC
PC + 1
Imm, (B
PL, [SP-1]
PL, [SP-1]
SP + 1, A
[VU], PL
ii (ii = 15 bits, 0 to 32k)
PC + r (r is -31 to +32, except 1)
PL, [SP-1]
Reg - 1, Skip if Reg = 0
Imm
A, SP
Imm
A3...A0
i (i = 12 bits)
...
...
[SP], PU
[SP],PU
[SP],PU
X 1)
1
0
B 1)
X 1)
B 1)
SP - 1
[VL]
A0
B 1)
A0
[SP]
PU, SP-2, PC
PU,SP-2, PC
PU,SP-2, PC9...0
[SP-1], skip next instruction
Carry, HC
[SP-1]
[SP-1],GIE
C, HC
Carry, HC
C
Imm
Meml
A0
0FF
ii
1
Half Carry
Half Carry
i