COP8SA-DM National Semiconductor, COP8SA-DM Datasheet - Page 84

• Manufacturer Part Number: COP8SA-DM
• Description: MODULE DEBUGGING FOR COP8SA
• Manufacturer: National Semiconductor

Specifications of COP8SA-DM

• Module/board Type: Debugger Module
• For Use With/related Products: Cop 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *COP8SA-DM

2.14.4 Detection of Illegal Conditions
The device can detect various illegal conditions resulting from coding errors, transient
noise, power supply voltage drops, runaway programs, etc.
Reading of undefined ROM gets zeros. The opcode for software interrupt is 00. If the
program fetches instructions from undefined ROM, this will force a software interrupt,
thus signaling that an illegal condition has occurred.
The subroutine stack grows down for each call (jump to subroutine), interrupt, or PUSH,
and grows up for each return or POP. The stack pointer is initialized to RAM location 06F
Hex during reset. Consequently, if there are more returns than calls, the stack pointer
will point to addresses 070 and 071 Hex (which are undefined RAM). Undefined RAM
2-46
• The WATCHDOG detector circuit is inhibited during both the HALT and IDLE
• The CLOCK MONITOR detector circuit is active during both the HALT and IDLE
• With the single-pin R/C oscillator option selected and the CLKDLY bit reset, the
• With the crystal oscillator option selected, or with the single-pin R/C oscillator op-
• The IDLE timer T0 is not initialized with external RESET.
• The user can sync in to the IDLE counter cycle with an IDLE counter (T0) inter-
• A hardware WATCHDOG service occurs just as the device exits the IDLE mode.
• Following RESET, the initial WATCHDOG service (where the service window and
WDSVR. Any attempt to read this key data value of 01100 from WDSVR will read
as key data value of all 0's.
modes.
modes. Consequently, the device inadvertently entering the HALT mode will be de-
tected as a CLOCK MONITOR error (provided that the CLOCK MONITOR enable
option has been selected by the program).
WATCHDOG service window will resume following HALT mode from where it left
off before entering the HALT mode.
tion selected and the CLKDLY bit set, the WATCHDOG service window will be set
to its selected value from WDSVR following HALT. Consequently, the WATCH-
DOG should not be serviced for at least 256 instruction cycles following HALT, but
must be serviced within the selected window to avoid a WATCHDOG error.
rupt or by monitoring the T0PND flag. The T0PND flag is set whenever the twelfth
bit of the IDLE counter toggles (every 4096 instruction cycles). The user is respon-
sible for resetting the T0PND flag.
Consequently, the WATCHDOG should not be serviced for at least 256 instruction
cycles following IDLE, but must be serviced within the selected window to avoid a
WATCHDOG error.
the CLOCK MONITOR enable/disable must be selected) may be programmed any-
where within the maximum service window (65,536 instruction cycles) initialized
by RESET. Note that this initial WATCHDOG service may be programmed within
the initial 256 instruction cycles without causing a WATCHDOG error.
COP8SAx7 MICROCONTROLLER