COP8SA-DM National Semiconductor, COP8SA-DM Datasheet - Page 61

• Manufacturer Part Number: COP8SA-DM
• Description: MODULE DEBUGGING FOR COP8SA
• Manufacturer: National Semiconductor

Specifications of COP8SA-DM

• Module/board Type: Debugger Module
• For Use With/related Products: Cop 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *COP8SA-DM

The device contains a very versatile set of timers (T0, T1). Timer T1and associated
autoreload/capture registers power up containing random data.
2.9.1
The device supports applications that require maintaining real time and low power with
the IDLE mode. This IDLE mode support is furnished by the IDLE timer T0. The Timer
T0 runs continuously at the fixed rate of the instruction cycle clock, t
read or write to the IDLE Timer T0, which is a count down timer.
The Timer T0 supports the following functions:
The IDLE Timer T0 can generate an interrupt when the twelfth bit toggles. This toggle
is latched into the T0PND pending flag, and will occur every 4 .096 ms at the maximum
clock frequency (t
of Timer T0 to be enabled or disabled. Setting T0EN will enable the interrupt, while
resetting it will disable the interrupt.
2.9.2
One of the main functions of a microcontroller is to provide timing and counting
capability for real-time control tasks. The COP888 family offers a very versatile 16-bit
timer/counter structure, and two supporting 16-bit autoreload/capture registers (R1A
and R1B), optimized to reduce software burdens in real-time control applications. The
timer block has two pins associated with it, T1A and T1B. Pin T1A supports I/O required
by the timer block, while pin T1B is an input to the timer block.
The timer block has three operating modes: Processor Independent PWM mode, External
Event Counter mode, and Input Capture mode.
The control bits T1C3, T1C2, and T1C1 allow selection of the different modes of
operation.
Mode 1. Processor Independent PWM Mode
One of the timer's operating modes is the Processor Independent PWM mode. In this
mode, the timer generates a "Processor Independent" PWM signal because once the timer
is setup, no more action is required from the CPU which
overhead and greater throughput. The user software services the timer block only when
the PWM parameters require updating. This capability is provided by the fact that the
timer has two separate 16 -bit reload registers. One of the reload registers contains the
"ON" timer while the other holds the "OFF" time. By contrast, a microcontroller that has
• Exit out of the Idle Mode (See Idle Mode description)
• WATCHDOG logic (See WATCHDOG description)
• Start up delay out of the HALT mode
• Timing the width of the internal power-on-reset
Timer T0 (IDLE Timer)
Timer T1
C
= 1 s). A control flag T0EN allows the interrupt from the twelfth bit
COP8SAx7 MICROCONTROLLER
translates to less software
C
. The user cannot
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