COP8SA-DM National Semiconductor, COP8SA-DM Datasheet - Page 62

• Manufacturer Part Number: COP8SA-DM
• Description: MODULE DEBUGGING FOR COP8SA
• Manufacturer: National Semiconductor

Specifications of COP8SA-DM

• Module/board Type: Debugger Module
• For Use With/related Products: Cop 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *COP8SA-DM

(alternate between the on-time/off-time).
The timer can generate the PWM output with the width and duty cycle controlled by the
values stored in the reload registers. The reload registers control the countdown values
and the reload values are automatically written into the timer when it counts down
through 0, generating interrupt on each reload. Under software control and with
minimal overhead, the PMW outputs are useful in controlling motors, triacs, the
intensity of displays, and in providing inputs for data acquisition and sine wave
generators.
In this mode, the timer T1 counts down at a fixed rate of tc. Upon every underflow the
timer is alternately reloaded with the contents of supporting registers, R1A and R1B.
The very first underflow of the timer causes the timer to reload from the register R1A.
Subsequent underflows cause the timer to be reloaded from the registers alternately
beginning with the register R1B.
The T1 Timer control bits, T1C3, T1C2 and T1C1 set up the timer for PWM mode
operation.
Figure 2-15 shows a block diagram of the timer in PWM mode.
The underflows can be programmed to toggle the T1A output pin. The underflows can
also be programmed to generate interrupts.
Underflows from the timer are alternately latched into two pending flags, T1PNDA and
T1PNDB. The user must reset these pending flags under software control. Two control
enable flags, T1ENA and T1ENB, allow the interrupts from the timer underflow to be
enabled or disabled. Setting the timer enable flag T1ENA will cause an interrupt when
a timer underflow causes the R1A register to be reloaded into the timer. Setting the timer
enable flag T1ENB will cause an interrupt when a timer underflow causes the R1B
register to be reloaded into the timer. Resetting the timer enable flags will disable the
associated interrupts.
2-24
COP8SAx7 MICROCONTROLLER
Figure 2-15 Timer in PWM Mode
RELOAD REGISTER
RELOAD REGISTER
16 BIT TIMER/
16 BIT AUTO
16 BIT AUTO
COUNTER
TIME 1
TIME 2
R1A
R1B
LATCH
Pin G3
DATA
TIMER
UNDERFLOW
INTERRUPTS
T1A
t
C