COP8SA-DM National Semiconductor, COP8SA-DM Datasheet - Page 253

• Manufacturer Part Number: COP8SA-DM
• Description: MODULE DEBUGGING FOR COP8SA
• Manufacturer: National Semiconductor

Specifications of COP8SA-DM

• Module/board Type: Debugger Module
• For Use With/related Products: Cop 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *COP8SA-DM

Jump Absolute addressing mode 2-58
Jump Absolute Long (JMPL) 2-83
Jump Absolute Long addressing mode 2-58
Jump Indirect (JID) 2-81
Jump Indirect addressing mode 2-59
Jump Relative (JP) 2-84
Jump Relative addressing mode 2-58
Jump Subroutine (JSR) 2-85
Jump Subroutine Long (JSRL) 2-86
Keyboard applications 4-38
Keyboard scanning 4-39
Keypad scanning 4-36, 4-48
LCD display unit 4-36
LCD display units 4-42
LED direct drive 4-39
Literature, available 3-10
Load Accumulator (LD) 2-88
Load Accumulator Indirect (LAID) 2-87
Load and Exchange instructions 2-61
Load B Pointer (LD) 2-90
Load Memory (LD) 2-91
Load Register (LD) 2-92
Logical instructions 2-61
Low-cost version for rolling code 4-27
Maskable interrupts 2-34
Master mode 2-48
Mechanical shielding 2-139
Memory Bit Manipulation instructions 2-61
Memory Direct addressing mode 1-20
Memory map 2-52
Microcontroller
Microprocessors
MICROWIRE/PLUS 2-47
Mnemonics instruction 1-19
Multi-Input Wakeup feature 2-31
Multilayer board 2-138
Multiple Byte Opcode 1-19
NM93C06 instruction set 4-6
NM93C06-COP8SAx7 interface 4-5
No Operation (NOP) 2-93
Non-maskable interrupts 2-41
No-Operation instructions 2-62
applications 1-3
architecture 1-6
building blocks 1-9
defined 1-1
differences with microprocessors 1-6
features/application matrix 1-4
operation 1-7
differences with microntrollers 1-6
interface 4-4
interface timing 2-50, 2-51
Master mode operation 2-48
master/slave protocol 4-4
Slave mode operation 2-49
M
K
N
L
On-chip power-on reset 2-17
Opcode fields 1-19
Opcode table 2-117
Opcodes instruction 1-19
Operand addressing modes 2-54
Operation of a microcontroller 1-7
Or (OR) 2-94
Ordering information 2-7
Oscillator 2-19
Oscillator Circuits 1-16
Oscillator control 2-139
OTP 3-9
OTP security 2-14
Output series resistance 2-139
Over-voltage detection 4-48
Packaging/pin efficiency 2-4
PC register 1-9, 2-11
Pending flag 2-41
Peripheral features 2-3
Physical dimensions A-1
Pin descriptions 2-8
Pointers 1-10
Pop Stack (POP) 2-95
Port L interrupts 2-42
Post-Decrement addressing mode 1-20
Post-Increment addressing mode 1-20
Power saving features 2-28
Power wakeup circuit 4-20
Processor Independent PWM Mode 2-23
Program Counter register 1-9
Program Memory
Program memory 1-9, 2-12
Programming examples 2-118
PSW register 2-22
Push Stack (PUSH) 2-96
PWM motor control 4-10
R/C Oscillator 1-16, 2-20
RAM, defined 1-1
Random Access Memory. See RAM
Read Only Memory. See ROM
Receiver circuit 4-27
Register B addressing mode 2-55
Register Indirect addressing mode 1-20
Registers
Crystal 2-19
External 2-20
R/C 2-20
HALT mode 2-28
IDLE mode 2-29
defined 1-1
A 2-11
B 2-11
CNTRL 2-21
control 1-12
CPU 2-11
definition of 2-113
ECON 2-13
ICNTRL 2-22
PC 1-9, 2-11
O
P
R
INDEX
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