COP8SA-DM National Semiconductor, COP8SA-DM Datasheet - Page 82

• Manufacturer Part Number: COP8SA-DM
• Description: MODULE DEBUGGING FOR COP8SA
• Manufacturer: National Semiconductor

Specifications of COP8SA-DM

• Module/board Type: Debugger Module
• For Use With/related Products: Cop 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *COP8SA-DM

2.14.1 Clock Monitor
The Clock Monitor aboard the device can be selected or deselected under program
control. The Clock Monitor is guaranteed not to reject the clock if the instruction cycle
clock (1/t
greater or equal to 100 kHz.
2.14.2 WATCHDOG/Clock Monitor Operation
The WATCHDOG is enabled by bit 2 of the ECON register. When this ECON bit is 0, the
WATCHDOG is enabled and pin G1 becomes the WATCHDOG output with a weak
pullup.
The WATCHDOG and Clock Monitor are disabled during reset. The device comes out of
reset with the WATCHDOG armed, the WATCHDOG Window Select bits (bits 6, 7 of the
WDSVR Register) set, and the Clock Monitor bit (bit 0 of the WDSVR Register) enabled.
Thus, a Clock Monitor error will occur after coming out of reset, if the instruction cycle
clock frequency has not reached a minimum specified value, including the case where the
oscillator fails to start.
The WDSVR register can be written to only once after reset and the key data (bits 5
through 1 of the WDSVR Register) must match to be a valid write. This write to the
WDSVR register involves two irrevocable choices: (i) the selection of the WATCHDOG
service window (ii) enabling or disabling of the Clock Monitor. Hence, the first write to
WDSVR Register involves selecting or deselecting the Clock Monitor, select the
WATCHDOG service window and match the WATCHDOG key data. Subsequent writes
to the WDSVR register will compare the value being written by the user to the
WATCHDOG service window value and the key data (bits 7 through 1) in the WDSVR
Register. Table 2-8 shows the sequence of events that can occur.
The user must service the WATCHDOG at least once before the upper limit of the service
window expires. The WATCHDOG may not be serviced more than once in every lower
limit of the service window. The user may service the WATCHDOG as many times as
wished in the time period between the lower and upper limits of the service window. The
first write to the WDSVR Register is also counted as a WATCHDOG service.
The WATCHDOG has an output pin associated with it. This is the WDOUT pin, on pin
1 of the port G. WDOUT is active low. The WDOUT pin has a weak pullup in the inactive
2-44
COP8SAx7 MICROCONTROLLER
c
) is greater or equal to 10 kHz. This equates to a clock input rate on CKI of
WDSVR
Bit 7
0
0
1
1
WDSVR
Bit 6
0
1
0
1
(Lower-Upper Limits)
256–8k t
256–16k t
256–32k t
256–64k t
Service Window
c
c
c
c
Cycles
Cycles
Cycles
Cycles