COP8SA-DM National Semiconductor, COP8SA-DM Datasheet - Page 66

• Manufacturer Part Number: COP8SA-DM
• Description: MODULE DEBUGGING FOR COP8SA
• Manufacturer: National Semiconductor

Specifications of COP8SA-DM

• Module/board Type: Debugger Module
• For Use With/related Products: Cop 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *COP8SA-DM

2.11 POWER SAVING FEATURES
Today, the proliferation of battery-operated based applications has placed new demands
on designers to drive power consumption down. Battery- operated systems are not the
only type of applications demanding low power. The power budget constraints are also
imposed on those consumer/industrial applications where well regulated and expensive
power supply costs cannot be tolerated. Such applications rely on low cost and low power
supply voltage derived directly from the "mains" by using voltage rectifier and passive
components. Low power is demanded even in automotive applications, due to increased
vehicle electronics content. This is required to ease the burden from the car battery. Low
power 8-bit microcontrollers supply the smarts to control battery-operated, consumer/
industrial, and automotive applications.
The COPSAx7 devices offers system designers a variety of low-power consumption
features that enable them to meet the demanding requirements of today's increasing
range of low -power applications. These features include low voltage operation, low
current drain, and power saving features such as HALT, IDLE, and Multi-Input wakeup
(MIWU).
The devices offers the user two power save modes of operation: HALT and IDLE. In the
HALT mode, all microcontroller activities are stopped. In the IDLE mode, the on-board
oscillator circuitry and timer T0 are active but all other microcontroller activities are
stopped. In either mode, all on-board RAM, registers, I/O states, and timers (with the
exception of T0) are unaltered.
Clock Monitor if enabled can be active in both modes.
2.11.1 HALT Mode
The device can be placed in the HALT mode by writing a “1” to the HALT flag (G7 data
bit). All microcontroller activities, including the clock and timers, are stopped. The
WATCHDOG logic on the device is disabled during the HALT mode. However, the clock
monitor circuitry, if enabled, remains active and will cause the WATCHDOG output pin
(WDOUT) to go low. If the HALT mode is used and the user does not want to activate the
WDOUT pin, the Clock Monitor should be disabled after the device comes out of reset
(resetting the Clock Monitor control bit with the first write to the WDSVR register). In
the HALT mode, the power requirements of the device are minimal and the applied
) may be decreased to V
(V
= 2.0V) without altering the state of the
voltage (V
CC
r
r
machine.
The device supports three different ways of exiting the HALT mode. The first method of
exiting the HALT mode is with the Multi-Input Wakeup feature on Port L. The second
method is with a low to high transition on the CKO (G7) pin. This method precludes the
use of the crystal clock configuration (since CKO becomes a dedicated output), and so
may only be used with an R/C or external clock configuration. The third method of exiting
the HALT mode is by pulling the RESET pin low.
Since a crystal or ceramic resonator may be selected as the oscillator, the Wakeup signal
is not allowed to start the chip running immediately since crystal oscillators and ceramic
resonators have a delayed start up time to reach full amplitude and frequency stability.
The IDLE timer is used to generate a fixed delay to ensure that the oscillator has indeed
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COP8SAx7 MICROCONTROLLER