COP8SA-DM National Semiconductor, COP8SA-DM Datasheet - Page 156

• Manufacturer Part Number: COP8SA-DM
• Description: MODULE DEBUGGING FOR COP8SA
• Manufacturer: National Semiconductor

Specifications of COP8SA-DM

• Module/board Type: Debugger Module
• For Use With/related Products: Cop 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *COP8SA-DM

This section is intended to be an overview of programming examples. For more detailed
and varied programming examples, refer to the Microontroller COP8 Databook.
2.19.1 Clear RAM
The following program clears all RAM locations in the base segment except for the stack
pointer. The value of the argument to IFBNE may need to be adjusted, depending on the
size of RAM in specific family members.
PROGRAM TO CLEAR ALL RAM EXCEPT SP
CLRAM:
CLRAM2: LD
CLRAM3: LD
2.19.2 Binary/BCD Arithmetic Operations
The arithmetic instructions include the Add (ADD), Add with Carry (ADC), Subtract
with Carry (SUBC), Increment (INC), Decrement (DEC), Decimal Correct (DCOR), Clear
Accumulator (CLR), Set Carry (SC), and Reset Carry (RC). The shift and rotate
instructions, which include the Rotate Right through Carry (RRC), the Rotate Left
through Carry (RLC), and the Swap accumulator nibbles (SWAP), may also be considered
arithmetic instruction variations. The RRC instruction is instrumental in writing a fast
multiply routine.
In subtraction, a borrow is represented by the absence of a Carry and vice versa.
Consequently, the Carry flag needs to be set (no borrow) before a subtraction, just as the
Carry flag is reset (no carry) before an addition. The ADD instruction does not use the
Carry flag as an input. It should also be noted that both the Carry and Half Carry flags
(Bits 6 and 7, respectively, of the PSW control register) are cleared with RESET and
remain unchanged with the ADD, INC, DEC, DCOR, CLR, and SWAP instructions. The
DCOR instruction uses both the Carry and Half Carry flags. The SC instruction sets both
the Carry and Half Carry flags, while the RC instruction resets both these flags.
The following program examples illustrate additions and subtractions of 4-byte data
fields in both binary and BCD (Binary Coded Decimal). The four bytes from data memory
locations 24 through 27 are added to or subtracted from the four bytes in data memory
locations 16 through 19. The results replace the data in memory locations 24 through 27.
These operations are performed both in binary and BCD. It should be noted that the BCD
preconditioning of adding (ADD) the hexadecimal value 66 is necessary only with the
BCD addition, not with the BCD subtraction. The binary coded decimal DCOR (Decimal
Correct) instruction uses both the Cary and Half Carry flags as inputs but does not
change the Carry and Half Carry flags. Also note that the #12 with the IFBNE
2-118
COP8SAx7 MICROCONTROLLER
LD
LD
DRSZ
JP
LD
IFBNE
JP
LD
0FC,#070
B,#0
[B+],#0
0FC
CLRAM2
B,#0F0
[B+],#0
#0D
CLRAM3
B,#0
;Define X-pointer as counter
:Initialize B pointer
;Load mem with 0 and incr B pointer
;Decrement counter
;Skip if lower half RAM is cleared
;Point B to upper half of RAM
;Load upper RAM half with 0
;until B points to 0FD (=SP)
;Skip if B=0FD
;Initialize B to 0