COP8SA-DM National Semiconductor, COP8SA-DM Datasheet - Page 123

• Manufacturer Part Number: COP8SA-DM
• Description: MODULE DEBUGGING FOR COP8SA
• Manufacturer: National Semiconductor

Specifications of COP8SA-DM

• Module/board Type: Debugger Module
• For Use With/related Products: Cop 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *COP8SA-DM

Syntax:
Description:
Operation:
Instruction Addressing Mode
JSR ADDR
JSR ADDR
This instruction pushes the return address onto the software stack in
data memory and then jumps to the subroutine address. The contents of
PCL (Lower 8 bits of PC) are transferred to the data memory location
referenced by SP (Stack Pointer). SP is then decremented, followed by
the contents of PCU (Upper 7 bits of PC) being transferred to the new
data memory location referenced by SP. The return address has now
been saved on the software stack in data memory RAM. Then SP is again
decremented to set up the software stack reference for the next subrou-
tine.
The address range is 15 bits. The JSR instruction address contents is
only 12 bits. Resolution of the high 3 bits of the address is to the 4K
memory segment containing the high byte of the return address. A
JSR contained in the last 2 bytes of a 4K segment will jump to the next
segment. The following diagram illustrates:
If the return address is in 4K segment 0, the jump address is in segment 0.
If the return address is in 4K segment 1, the jump address is in segment 1.
[SP] <- PCL
[SP - 1] <- PCU
[SP - 2]: SET UP FOR NEXT STACK REFERENCE
PC11-8 <- HIADDR (HIGH NIBBLE OF RETURN ADDRESS, LOW
NIBBLE OF FIRST BYTE INSTRUCTION)
PC7-0 <- LOADDR (SECOND BYTE OF INSTRUCTION)
Absolute
0000
RETURN WITHIN SEGMENT
0xxx
3x
xx ...
Instruction
Cycles
0FFE
3x
5
0FFF
xx
RETURN TO NEXT SEGMENT
COP8SAx7 MICROCONTROLLER
1000
Bytes
2
3HIADDR/LOADDR
Hex Op Code
1xxx
1FFF
2-85