COP8SA-DM National Semiconductor, COP8SA-DM Datasheet - Page 81

• Manufacturer Part Number: COP8SA-DM
• Description: MODULE DEBUGGING FOR COP8SA
• Manufacturer: National Semiconductor

Specifications of COP8SA-DM

• Module/board Type: Debugger Module
• For Use With/related Products: Cop 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *COP8SA-DM

2.14 WATCHDOG/CLOCK MONITOR
The devices contain a user selectable WATCHDOG and clock monitor. The following
section is applicable only if WATCHDOG feature has been selected in the ECON register.
The WATCHDOG is designed to detect the user program getting stuck in infinite loops
resulting in loss of program control or “runaway” programs.
The WATCHDOG logic contains two separate service windows. While the user
programmable upper window selects the Watchdog service time, the lower widow
provides protection against an infinite program loop that contains the watchdog service
instruction.
The COPSAx7 devices provide the added feature of a software trap that provides
protection against stack overpops and addressing locations outside valid user program
space.
The Clock Monitor is used to detect the absence of a clock or a very slow clock below a
specified rate on the CKI pin.
The WATCHDOG consists of two independent logic blocks: WD UPPER and WD
LOWER. WD UPPER establishes the upper limit on the service window and WD
LOWER defines the lower limit of the service window.
Servicing the WATCHDOG consists of writing a specific value to a WATCHDOG Service
Register named WDSVR which is memory mapped in the RAM. This value is composed
of three fields, consisting of a 2-bit Window Select, a 5-bit Key Data field, and the 1-bit
Clock Monitor Select field. Table 2-6 shows the WDSVR register.
The lower limit of the service window is fixed at 256 instruction cycles. Bits 7 and 6 of the
WDSVR register allow the user to pick an upper limit of the service window.
Table 2-7 shows the four possible combinations of lower and upper limits for the
WATCHDOG service window. This flexibility in choosing the WATCHDOG service
window prevents any undue burden on the user software.
Bits 5, 4, 3, 2 and 1 of the WDSVR register represent the 5-bit Key Data field. The key
data is fixed at 01100. Bit 0 of the WDSVR Register is the Clock Monitor Select bit.
interrupt routine in progress can be interrupted by the non-maskable inter-
rupt request. A maskable interrupt routine should end with an RETI instruc-
tion.
Table 2-6 WATCHDOG Service Register (WDSVR)
Window
X
Select
7
X
6
0 1 1 0 0
5 4 3 2 1
Key Data
COP8SAx7 MICROCONTROLLER
Monitor
Clock
Y
0
2-43