Z8F2480AN020SG Zilog, Z8F2480AN020SG Datasheet - Page 109

• Manufacturer Part Number: Z8F2480AN020SG
• Description: MCU 8BIT 24KB FLASH 44LQFP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F2480AN020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 37
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LQFP
• Processor Series: Z8F248x
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4676

PS025011-1010
PWM Dual Output Mode
In PWM Dual Output mode, the timer outputs a Pulse Width Modulator output signal and
also its complement through two GPIO Port pins. The Timer counts timer clocks up to the
16-bit Reload value. The timer first counts up to 16-bit PWM match value stored in the
Timer PWM0 High and Low Byte registers. When the timer count value matches the
PWM value, the Timer Outputs (TOUT and TOUT) toggle. The timer continues counting
until it reaches the Reload value stored in the Timer Reload High and Low Byte registers.
On reaching the Reload value, the timer generates an interrupt, the count value in the
Timer High and Low Byte registers is reset to
and counting resumes.
If the TPOL bit in the Timer Control 1 register is set to 1, the Timer Output signal begins
as High (1) and then transitions to Low (0) when the timer value matches the PWM value.
The Timer Output signal returns to High (1) after the timer reaches the Reload value and is
reset to
If the TPOL bit in the Timer Control 1 register is set to 0, the Timer Output signal begins
as Low (0) and then transitions to High (1) when the timer value matches the PWM value.
The Timer Output signal returns to Low (0) after the timer reaches the Reload value and is
reset to
The timer also generates a second PWM output signal, Timer Output Complement
(TOUT). TOUT is the complement of the Timer Output PWM signal (TOUT). 
A programmable deadband delay can be configured to time delay (0 to 128 timer clock
cycles) when one PWM output transition from High to Low and the other PWM output
transition from a Low to High. This ensures a time gap between the removal of one PWM
output and the assertion of its complement.
Follow the steps below for configuring a timer for PWM Dual Output mode and initiating
the PWM operation:
1. Write to the Timer Control 1 register to:
2. Write to the Timer High and Low Byte registers to set the starting count value
3. Write to the Timer PWM0 High and Low Byte registers to set the PWM value.
4. Write to the Timer Control 0 register:
–
–
–
–
(typically
reset in PWM mode, counting always begins at the reset value of
–
–
0001H
0001H
Disable the timer.
Configure the timer for PWM Dual Output mode. Setting the mode also involves
writing to TMODE[3] bit in TxCTL0 register.
Set the prescale value.
Set the initial logic level (High or Low) and PWM High/Low transition for the
Timer Output Alternate Function.
To set the PWM deadband delay value
To choose the timer clock source
0001H
.
.
). This only affects the first pass in PWM mode. After the first timer
P R E L I M I N A R Y
0001H
and TOUT, and TOUT toggles again
Z8 Encore! XP
Product Specification
0001H
®
F1680 Series
.
Timers
95