Z8F2480AN020SG Zilog, Z8F2480AN020SG Datasheet - Page 81

• Manufacturer Part Number: Z8F2480AN020SG
• Description: MCU 8BIT 24KB FLASH 44LQFP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F2480AN020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 37
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LQFP
• Processor Series: Z8F248x
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4676

Table 26. Port A–E Pull-Up Enable Subregisters (PxPUE)
Table 27. Port A–E Alternate Function Set 1 Subregisters (PxAFS1)
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS025011-1010
Note:
Port A–E Alternate Function Set 1 Subregisters
Port A–E Alternate Function Set 2 Subregisters
PAFS17
PPUE7
R/W
R/W
If 06H in Port A
If 07H in Port A–E Address Register, accessible through the Port A–E Control Register
7
0
7
0
PPUE[7:0]—Port Pull-up Enabled
0 = The weak pull-up on the Port pin is disabled.
1 = The weak pull-up on the Port pin is enabled.
The Port A–E Alternate Function Set1 subregister
Port A–E Control register by writing
Function Set 1 subregisters select the alternate function available at a port pin. 
Alternate Functions selected by setting or clearing bits of this register are defined in
Alternate Functions
Alternate function selection on port pins must also be enabled as described in
Alternate Function Subregisters
PAFS1[7:0]—Port Alternate Function Set 1
0 = Port Alternate Function selected as defined in
1 = Port Alternate Function selected as defined in
The Port A–E Alternate Function Set 2 subregister (see
through the Port A–E Control register by writing
The Alternate Function Set 2 subregisters selects the alternate function available at a port
section
section
PAFS16
PPUE6
R/W
R/W
6
0
6
0
GPIO Alternate Functions
GPIO Alternate Functions
–
E Address Register, accessible through the Port A
PAFS15
PPUE5
on page 50.
R/W
R/W
5
0
5
0
P R E L I M I N A R Y
PAFS14
PPUE4
on page 64
R/W
R/W
4
0
4
0
07H
on page 50.
on page 50.
to the Port A–E Address register. The Alternate
.
PAFS13
PPUE3
R/W
R/W
3
0
3
0
08H
Table 15
Table 15
(Table
to the Port A–E Address register.
Z8 Encore! XP
Table 28
PAFS12
PPUE2
27) is accessed through the 
R/W
R/W
through
through
2
0
2
0
General-Purpose Input/Output
Product Specification
on page 68) is accessed
–
E Control Register
Table 17
Table 17
PAFS11
PPUE1
R/W
R/W
1
0
1
0
®
F1680 Series
in 
in 
Port A–E
PAFS10
PPUE0
R/W
R/W
GPIO
0
0
0
0
67