Z8F2480AN020SG Zilog, Z8F2480AN020SG Datasheet - Page 122

• Manufacturer Part Number: Z8F2480AN020SG
• Description: MCU 8BIT 24KB FLASH 44LQFP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F2480AN020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 37
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LQFP
• Processor Series: Z8F248x
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4676

Table 54. Timer 0
Table 55. Timer 0
PS025011-1010
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
Timer Reload High and Low Byte Registers
Timer 0
R/W
R/W
7
1
7
1
The Timer 0–2 Reload High and Low Byte (TxRH and TxRL) registers
Table
Reload High Byte register are stored in a temporary holding register. When a write to the
Timer Reload Low Byte register occurs, the temporary holding register value is written to
the Timer High Byte register. This operation allows simultaneous updates of the 16-bit
Timer Reload value.
In COMPARE mode, the Timer Reload High and Low Byte registers store the 16-bit
Compare value.
TRH and TRL—Timer Reload Register High and Low
These two bytes form the 16-bit Reload value, {TRH[7:0], TRL[7:0]}. This value is used
to set the maximum count value which initiates a timer reload to 0001H. In COMPARE
mode, these two byte form the 16-bit Compare value.
The Timer 0–2 PWM0 High and Low Byte (TxPWM0H and TxPWM0L) registers 
(see
operations. These registers also store the Capture values for the CAPTURE, CAPTURE/
COMPARE and DEMODULATION modes. When the timer is enabled, writes to these
registers are buffered and loading of the registers is delayed until a timer reload to
unless PWM0UE = 1
–
–
–
2 Reload High Byte Register (TxRH)
2 Reload Low Byte Register (TxRL)
2 PWM0 High and Low Byte Registers
Table 56
55) store a 16-bit reload value, {TRH[7:0], TRL[7:0]}. Values written to the Timer
R/W
R/W
6
1
6
1
and
Table 57
R/W
R/W
5
1
5
1
on page 109) are used for Pulse Width Modulator (PWM)
P R E L I M I N A R Y
F02H, F0AH, F12H
F03H, F0BH, F13H
R/W
R/W
4
1
4
1
TRH
TRL
R/W
R/W
3
1
3
1
Z8 Encore! XP
R/W
R/W
2
1
2
1
Product Specification
R/W
R/W
1
1
1
1
(Table 54
®
F1680 Series
and
R/W
R/W
0001H
0
1
0
1
Timers
108