Z8F2480AN020SG Zilog, Z8F2480AN020SG Datasheet - Page 254

• Manufacturer Part Number: Z8F2480AN020SG
• Description: MCU 8BIT 24KB FLASH 44LQFP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F2480AN020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 37
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LQFP
• Processor Series: Z8F248x
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4676

Table 125. I
Table 124. I
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS025011-1010
Bit Position
[7:0]
BRL
Note:
Note:
I
2
2
2
C State Register (I2CSTATE)—Description when DIAG = 1
C State Register
C Baud Rate Low Byte Register (I2CBRL = F54H)
R/W
FFh
R
7
7
0
Value
I
The least significant byte, BRG[7:0], of the I
If the
the current value of the I
If the
the current value of the I
The Read-only I
I
provides information on the internal state of the I
Table 126
When the
I
I2CSTATE_H—I
This field defines the current state of the I
the internal state machine.
I2CSTATE_L—Least significant nibble of the I
This field defines the substates for the states defined by I2CSTATE_H.
243 defines the values for this field.
2
2
2
C Baud Rate Low Byte
C bus controller. When the
C controller state machine as listed in
DIAG
DIAG
R/W
FFh
DIAG
on page 241.
R
6
6
I2CSTATE_H
0
bit in the I
bit in the I
Description
2
bit of the I
C State Register provides information on the state of the I
2
C State
R/W
2
FFh
2
C Mode Register is set to 1, a read of the I2CBRH Register returns
C Mode Register is set to 1, a read of the I2CBRL Register returns
R
5
5
0
2
2
C Baud Rate Counter[15:8].
C Baud Rate Counter[7:0].
2
Table 127
P R E L I M I N A R Y
C Mode Register is set, this register returns the value of the
DIAG
R/W
FFh
bit of the I
R
4
4
0
on page 242 defines the states for this field.
F54H
F55H
BRL
Table
2
C controller. It is the most significant nibble of
2
C Baud Rate Generator’s reload value.
2
R/W
FFh
125.
C Mode Register is cleared, this register
R
3
3
0
2
C controller and I
2
C state machine 
Z8 Encore! XP
R/W
FFh
R
2
2
0
I2CSTATE_L
Product Specification
I2C Master/Slave Controller
2
C bus as listed in
R/W
FFh
Table 128
R
1
1
0
®
F1680 Series
2
C bus and the
on page
R/W
FFh
R
0
0
0
240