Z8F2480AN020SG Zilog, Z8F2480AN020SG Datasheet - Page 274

MCU 8BIT 24KB FLASH 44LQFP

Z8F2480AN020SG

Manufacturer Part Number
Z8F2480AN020SG
Description
MCU 8BIT 24KB FLASH 44LQFP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheets

Specifications of Z8F2480AN020SG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
37
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-LQFP
Processor Series
Z8F248x
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
37
Number Of Timers
3
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 8 Channel
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
269-4676

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F2480AN020SG
Manufacturer:
Zilog
Quantity:
85
Part Number:
Z8F2480AN020SG
Manufacturer:
Zilog
Quantity:
10 000
PS025011-1010
Caution:
Page Erase
Mass Erase
Flash Controller Bypass
Byte Programming can be accomplished using the On-Chip Debugger's Write Memory
command or eZ8 CPU execution of the LDC or LDCI instructions. For a description of the
LDC and LDCI instructions, refer to eZ8 CPU User Manual (UM0128) available for
download at www.zilog.com. While the Flash Controller programs the Flash memory, the
eZ8 CPU idles but the system clock and on-chip peripherals continue to operate. To exit
programming mode and lock the Flash, write any value to the Flash Control register,
except the Mass Erase or Page Erase commands.
The Flash memory can be erased one page (512 bytes) at a time. Page Erasing the Flash
memory sets all bytes in that page to the value
identifies the page to be erased. Only a page residing in an unprotected sector can be
erased. With the Flash Controller unlocked and the active page set, writing the value
to the Flash Control register initiates the Page Erase operation. While the Flash Controller
executes the Page Erase operation, the eZ8 CPU idles but the system clock and on-chip
peripherals continue to operate. The eZ8 CPU resumes operation after the Page Erase
operation completes. If the Page Erase operation is performed using the OCD, poll the
Flash Status register to determine when the Page Erase operation is complete. When the
Page Erase is complete, the Flash Controller returns to its locked state.
The Flash memory can also be Mass Erased using the Flash Controller, but only by using
the On-Chip Debugger. Mass Erasing the Flash memory sets all bytes to the value
With the Flash Controller unlocked and the Mass Erase successfully enabled, writing the
value
Controller executes the Mass Erase operation, the eZ8 CPU idles but the system clock and
on-chip peripherals continue to operate. Using the On-Chip Debugger, poll the Flash
Status register to determine when the Mass Erase operation is complete. When the Mass
Erase is complete, the Flash Controller returns to its locked state.
The Flash Controller can be bypassed and the control signals for the Flash memory is
brought out to the GPIO pins. Bypassing the Flash Controller allows faster Row
Programming algorithms by controlling the Flash programming signals directly.
Row programming is recommended for gang programming applications and large volume
customers who do not require in-circuit initial programming of the Flash memory. Mass
Erase and Page Erase operations are also supported when the Flash Controller is bypassed.
The byte at each address of the Flash memory cannot be programmed (any bits written
to 0) more than twice before an erase cycle occurs.
63H
to the Flash Control register initiates the Mass Erase operation. While the Flash
P R E L I M I N A R Y
FFH
. The Flash Page Select register
Z8 Encore! XP
Product Specification
®
F1680 Series
Flash Memory
FFH
95h
.
260

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