HD64F2338VFC25 Renesas Electronics America, HD64F2338VFC25 Datasheet - Page 233

MCU 3V 256K 144-QFP

HD64F2338VFC25

Manufacturer Part Number
HD64F2338VFC25
Description
MCU 3V 256K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of HD64F2338VFC25

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2338VFC25
Manufacturer:
Renesas Electronics America
Quantity:
10 000
7.1
The chip has a built-in DMA controller (DMAC) which can carry out data transfer on up to 4
channels.
7.1.1
The features of the DMAC are listed below.
• Choice of short address mode or full address mode
• 16-Mbyte address space can be specified directly
• Byte or word can be set as the transfer unit
• Activation sources: internal interrupt, external request, auto-request (depending on transfer
• Module stop mode can be set
Short address mode
⎯ Maximum of 4 channels can be used
⎯ Choice of dual address mode or single address mode
⎯ In dual address mode, one of the two addresses, transfer source and transfer destination, is
⎯ In single address mode, transfer source or transfer destination address only is specified as
⎯ In single address mode, transfer can be performed in one bus cycle
⎯ Choice of sequential mode, idle mode, or repeat mode for dual address mode and single
Full address mode
⎯ Maximum of 2 channels can be used
⎯ Transfer source and transfer destination address specified as 24 bits
⎯ Choice of normal mode or block transfer mode
mode)
⎯ Six 16-bit timer-pulse unit (TPU) compare match/input capture interrupts
⎯ Serial communication interface (SCI0, SCI1) transmit-data-empty interrupt, receive-data-
⎯ A/D converter conversion end interrupt
⎯ External request
⎯ Auto-request
specified as 24 bits and the other as 16 bits
24 bits
address mode
full interrupt
Overview
Features
Section 7 DMA Controller
Rev.4.00 Sep. 07, 2007 Page 201 of 1210
REJ09B0245-0400

Related parts for HD64F2338VFC25