HD64F2338VFC25 Renesas Electronics America, HD64F2338VFC25 Datasheet - Page 244
![MCU 3V 256K 144-QFP](/photos/12/30/123043/df2633f25v_sml.jpg)
HD64F2338VFC25
Manufacturer Part Number
HD64F2338VFC25
Description
MCU 3V 256K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.DF2338VFC25V.pdf
(1246 pages)
Specifications of HD64F2338VFC25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F2338VFC25
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 244 of 1246
- Download datasheet (7Mb)
Bit 5—Repeat Enable (RPE): Used in combination with the DTIE bit in DMABCR to select the
mode (sequential, idle, or repeat) in which transfer is to be performed.
Bit 5
RPE
0
1
For details of operation in sequential, idle, and repeat mode, see section 7.5.2, Sequential Mode,
section 7.5.3, Idle Mode, and section 7.5.4, Repeat Mode.
Bit 4—Data Transfer Direction (DTDIR): Used in combination with the SAE bit in DMABCR
to specify the data transfer direction (source or destination). The function of this bit is therefore
different in dual address mode and single address mode.
DMABCR
SAE
0
1
Rev.4.00 Sep. 07, 2007 Page 212 of 1210
REJ09B0245-0400
DMABCR
DTIE
0
1
0
1
Bit 4
DTDIR
0
1
0
1
Description
Transfer in sequential mode (no transfer end interrupt)
Transfer in sequential mode (with transfer end interrupt)
Transfer in repeat mode (no transfer end interrupt)
Transfer in idle mode (with transfer end interrupt)
Description
Transfer with MAR as source address and IOAR as destination
address
Transfer with IOAR as source address and MAR as destination address
Transfer with MAR as source address and DACK pin as write strobe
Transfer with DACK pin as read strobe and MAR as destination address
(Initial value)
(Initial value)
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