HD64F2338VFC25 Renesas Electronics America, HD64F2338VFC25 Datasheet - Page 800
![MCU 3V 256K 144-QFP](/photos/12/30/123043/df2633f25v_sml.jpg)
HD64F2338VFC25
Manufacturer Part Number
HD64F2338VFC25
Description
MCU 3V 256K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.DF2338VFC25V.pdf
(1246 pages)
Specifications of HD64F2338VFC25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F2338VFC25
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 800 of 1246
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19.8
There are three kinds of flash memory program/erase protection: hardware protection, software
protection, and error protection.
19.8.1
Hardware protection refers to a state in which programming/erasing of flash memory is forcibly
disabled or aborted. Settings in flash memory control registers 1 and 2 (FLMCR1, FLMCR2) and
erase block registers 1 and 2 (EBR1, EBR2) are reset. (See table 19.11.)
Table 19.11 Hardware Protection
Item
Reset/standby
protection
19.8.2
Software protection can be implemented by setting the SWE bit in flash memory control register 1
(FLMCR1), erase block registers 1 and 2 (EBR1, EBR2), and the RAMS bit in the RAM
emulation register (RAMER). When software protection is in effect, setting the P or E bit in
FLMCR1 does not cause a transition to program mode or erase mode. (See table 19.12.)
Rev.4.00 Sep. 07, 2007 Page 768 of 1210
REJ09B0245-0400
Flash Memory Protection
Hardware Protection
Software Protection
Description
•
•
In a reset (including a WDT overflow reset)
and in standby mode, FLMCR1, FLMCR2,
EBR1, and EBR2 are initialized, and the
program/erase-protected state is entered.
In a reset via the RES pin, the reset state is
not entered unless the RES pin is held low
until oscillation stabilizes after powering on.
In the case of a reset during operation, hold
the RES pin low for the RES pulse width
specified in section 22.2.3, AC
Characteristics.
Program
Yes
Functions
Erase
Yes
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