HD64F2338VFC25 Renesas Electronics America, HD64F2338VFC25 Datasheet - Page 668
![MCU 3V 256K 144-QFP](/photos/12/30/123043/df2633f25v_sml.jpg)
HD64F2338VFC25
Manufacturer Part Number
HD64F2338VFC25
Description
MCU 3V 256K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.DF2338VFC25V.pdf
(1246 pages)
Specifications of HD64F2338VFC25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F2338VFC25
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Table 14.11 Receive Error Conditions
Receive Error
Overrun error
Framing error
Parity error
Figure 14.8 shows an example of the operation for reception in asynchronous mode.
Rev.4.00 Sep. 07, 2007 Page 636 of 1210
REJ09B0245-0400
RDRF
FER
1
Start
bit
0
D0
Abbreviation
ORER
FER
PER
Figure 14.8 Example of SCI Receive Operation
(Example with 8-Bit Data, Parity, One Stop Bit)
D1
1 frame
Data
D7
Condition
When the next data reception is
completed while the RDRF flag
in SSR is set to 1
When the stop bit is 0
When the received data differs
from the parity (even or odd) set
in SMR
RXI interrupt
request
generated
Parity
bit
0/1
Stop
bit
1
Start
bit
0
RDR data read and RDRF
flag cleared to 0 in RXI
interrupt handling routine
D0
D1
Data
Data Transfer
Receive data is not
transferred from RSR to
RDR
Receive data is transferred
from RSR to RDR
Receive data is transferred
from RSR to RDR
D7
Parity
bit
ERI interrupt request
generated by framing
error
0/1
Stop
bit
0
Idle state
(mark state)
1
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