HD64F2338VFC25 Renesas Electronics America, HD64F2338VFC25 Datasheet - Page 452

• Manufacturer Part Number: HD64F2338VFC25
• Description: MCU 3V 256K 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of HD64F2338VFC25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

9.15.2
Table 9.28 shows the port E register configuration.
Table 9.28 Port E Registers
Name
Port E data direction register
Port E data register
Port E register
Port E MOS pull-up control register
Note: * Lower 16 bits of the address.
Port E Data Direction Register (PEDDR)
PEDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port E. PEDDR cannot be read; if it is, an undefined value will be read.
PEDDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
• Modes 4 to 6
• Mode 7
Rev.4.00 Sep. 07, 2007 Page 420 of 1210
REJ09B0245-0400
Bit
Initial value :
R/W
When 8-bit bus mode has been selected, port E pins function as I/O ports. Setting a PEDDR bit
to 1 makes the corresponding port E pin an output port, while clearing the bit to 0 makes the
pin an input port.
When 16-bit bus mode has been selected, the input/output direction specification by PEDDR is
ignored, and port E is designated for data I/O.
For details of 8-bit and 16-bit bus modes, see section 6, Bus Controller.
Setting a PEDDR bit to 1 makes the corresponding port E pin an output port, while clearing the
bit to 0 makes the pin an input port.
Register Configuration
:
:
PE7DDR PE6DDR PE5DDR PE4DDR PE3DDR PE2DDR PE1DDR PE0DDR
W
7
0
W
6
0
Abbreviation
PEDDR
PEDR
PORTE
PEPCR
W
5
0
W
4
0
R/W
R/W
W
R/W
R
W
0
3
Initial Value
H'00
H'00
Undefined
H'00
W
2
0
W
1
0
H'FF74
Address *
H'FEBD
H'FF6D
H'FF5D
W
0
0