DF2161BVTE10 Renesas Electronics America, DF2161BVTE10 Datasheet - Page 114

MCU 3V 128K 144-TQFP

DF2161BVTE10

Manufacturer Part Number
DF2161BVTE10
Description
MCU 3V 128K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2161BVTE10

Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
114
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2161BVTE10
HD64F2161BVTE10
Section 2 CPU
Rev. 3.00 Mar 21, 2006 page 58 of 788
REJ09B0300-0300
Notes: 1.
RES = high
Exception-handling state
Bus-released state
2.
3.
Reset state *
From any state except hardware standby mode, a transition to the reset state occurs whenever RES
goes low. A transition can also be made to the reset state when the watchdog timer overflows.
From any state, a transition to hardware standby mode occurs when STBY goes low.
The power-down state also includes watch mode, subactive mode, subsleep mode, etc. For details,
refer to section 26, Power-Down Modes.
End of bus
request
End of
exception
handling
1
Figure 2.13 State Transitions
Bus
request
External interrupt
request
STBY = high, RES = low
Request for
exception
handling
Program execution
End of bus request
Bus request
state
Interrupt
request
SLEEP
instruction
with
LSON = 0,
PSS = 0,
SSBY = 1
SLEEP
instruction
with
LSON = 0,
SSBY = 0
Hardware standby mode *
Software standby mode
Power-down state *
Sleep mode
3
2

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