DF2161BVTE10 Renesas Electronics America, DF2161BVTE10 Datasheet - Page 116
DF2161BVTE10
Manufacturer Part Number
DF2161BVTE10
Description
MCU 3V 128K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.DF2160BVT10V.pdf
(847 pages)
Specifications of DF2161BVTE10
Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
114
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2161BVTE10
HD64F2161BVTE10
HD64F2161BVTE10
- Current page: 116 of 847
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Section 2 CPU
Prior to executing BCLR:
Input/output
Pin state
DDR
DR
BCLR instruction executed:
After executing BCLR:
Input/output
Pin state
DDR
DR
Operation:
1. When the BCLR instruction is executed, first the CPU reads P4DDR.
2. The CPU clears bit 0 of the read data to 0, changing data to H'FE.
3. The CPU writes H'FE to DDR, completing execution of BCLR.
As a result of the BCLR instruction, bit 0 in DDR is set to 0, and P40 becomes an input pin.
However, bits 7 and 6 of DDR are modified to 1, therefore P47 and P46 become output pins.
Rev. 3.00 Mar 21, 2006 page 60 of 788
REJ09B0300-0300
BCLR
Since P4DDR is a write-only register, so the CPU reads H'FF. In this example P4DDR has a
value of H'3F, but the value read by the CPU is H'FF.
#0,
P47
Input
Low
level
0
1
P47
Output
Low
level
1
1
@P4DDR
P46
Input
High
level
0
0
P46
Output
High
level
1
0
The BCLR instruction is executed for DDR in port 4.
P45
Output
Low
level
1
0
P45
Output
Low
level
1
0
P44
Output
Low
level
1
0
P44
Output
Low
level
1
0
P43
Output
Low
level
1
0
P43
Output
Low
level
1
0
P42
Output
Low
level
1
0
P42
Output
Low
level
1
0
P41
Output
Low
level
1
0
P41
Output
Low
level
1
0
P40
Output
Low
level
1
0
P40
Input
High
level
0
0
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