DF2161BVTE10 Renesas Electronics America, DF2161BVTE10 Datasheet - Page 267

• Manufacturer Part Number: DF2161BVTE10
• Description: MCU 3V 128K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2161BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 114
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2161BVTE10; HD64F2161BVTE10

8.12
Port B is an 8-bit I/O port. Port B pins also have XBS input/output pins, LPC input/output pins,
wakeup event interrupt input pins, and a data bus input/output function. The pin functions depend
on the operating mode. Port B has the following registers.
8.12.1
PBDDR specifies input or output for the pins of port B on a bit-by-bit basis.
Bit
7
6
5
4
3
2
1
0
Port B data direction register (PBDDR)
Port B output data register (PBODR)
Port B input data register (PBPIN)
Bit Name
PB7DDR
PB6DDR
PB5DDR
PB4DDR
PB3DDR
PB2DDR
PB1DDR
PB0DDR
Port B
Port B Data Direction Register (PBDDR)
Initial Value
0
0
0
0
0
0
0
0
R/W
W
W
W
W
W
W
W
W
Description
PBDDR has the same address as P7PIN, and if
read, the port 7 pin states will be returned.
Modes 1, 2, and 3 (EXPE = 1)
When the ABW bit in WSCR is cleared to 0,
port B pins automatically become data I/O
pins (D7 to D0), regardless of the input/output
direction indicated by PBDDR. When the
ABW bit is 1, a port B pin becomes an output
port if the corresponding PBDDR bit is set to
1, and an input port if the bit is cleared to 0.
Modes 2 and 3 (EXPE = 0)
A port B pin becomes an output port if the
corresponding PBDDR bit is set to 1, and an
input port if the bit is cleared to 0.
Rev. 3.00 Mar 21, 2006 page 211 of 788
Section 8 I/O Ports
REJ09B0300-0300