UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 1150

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
UF0EPS0
UF0INT1 register
UF0IS2
UF0EN register
UF0EPS0
UF0INT1 register
UF0IS2
IT1NK bit of
IT1DT
UF0EN register
Status of
IT1
IT1NK bit of
IT1DT
register
register
Status of
IT1
bit of
bit of
register
register
bit of
bit of
Writing
starts
FIFO
FIFO FW clear
(b) When Null packet or short packet is transmitted
Transmission
Figure 21-11. Operation of UF0INT1 Register
completed
Writing
Transmission
starts
FIFO
8-byte transfer
Transfer of Null packet
starts
FIFO full
Transmission
IT1DEND bit of
UF0DEND
register is set.
completed
(a) 8-byte transfer
Transmission
completed
CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
reception
ACK
reception
(FW clear)
INT clear
ACK
(FW clear)
INT clear
Writing
starts
FIFO
Writing
starts
8-byte transfer
FIFO
Transmission
completed
Transmission
Short packet transfer
starts
Writing
FIFO
completed
starts
Transmission
Writing
Hardware clear
FIFO
completed
FIFO full
Hardware clear
IT1DEND bit of
UF0DEND
register is set.
ACK cannot
be received
Transmission
completed
Re-transmission
Re-transfer
reloaded
Counter
starts
reception
Page 1150 of 1509
ACK
reception
ACK