UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 875

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
19.14.2 When communication reservation function is disabled (IICFn.IICRSVn bit = 1)
request is rejected and a start condition is not generated. There are two modes in which the bus is not used.
time shown in Table 19-7 is required until the STCFn flag is set after setting the STTn bit to 1. Therefore, secure the time
by software.
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
When the IICCn.STTn bit is set when the bus is not being used for communication during bus communication, this
• When arbitration results in neither master nor slave operation
• When an extension code is received and slave operation is disabled (ACK is not returned and the bus was released
To confirm whether the start condition was generated or the request was rejected, check the IICFn.STCFn flag. The
when the IICCn.LRELn bit was set to 1) (n = 0 to 2)
Remarks 1. ×: don’t care
OCKSENm
1
1
1
1
0
2. n = 0 to 2
m = 0, 1
OCKSm1
0
0
1
1
0
OCKSm0
Table 19-7. Wait Periods
0
1
0
1
0
CLn1
0
0
0
0
1
CLn0
×
×
×
×
0
Wait Period
20 clocks
30 clocks
40 clocks
50 clocks
10 clocks
CHAPTER 19 I
Page 875 of 1509
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C BUS