UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 947

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(4) CAN0 global automatic block transmission delay register (C0GMABTD)
The C0GMABTD register is used to set the interval at which the data of the message buffer assigned to ABT is to
be transmitted in the normal operation mode with ABT.
Cautions 1. Do not change the contents of the C0GMABTD register while the ABTTRG bit is set to 1.
After reset: 00H
C0GMABTD
ABTD3
0
0
0
0
0
0
0
0
1
2. The timing at which the ABT message is actually transmitted onto the CAN bus differs
3. Be sure to set bits 4 to 7 to “0”.
ABTD2
Other than above
depending on the status of transmission from the other station or how a request to
transmit a message other than an ABT message (message buffers 8 to 31) is made.
0
0
0
0
1
1
1
1
0
7
0
R/W
ABTD1
0
0
1
1
0
0
1
1
0
Address: 03FEC008H
6
0
ABTD0
0
1
0
1
0
1
0
1
0
0
0 DBT (default value)
2
2
2
2
2
2
2
2
Setting prohibited
5
5
6
7
8
9
10
11
12
DBT
DBT
DBT
DBT
DBT
DBT
DBT
DBT
Data frame interval during automatic block transmission
4
0
(Unit: Data bit time (DBT))
ABTD3
3
CHAPTER 20 CAN CONTROLLER
ABTD2
2
ABTD1
1
Page 947 of 1509
ABTD0
0