UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 761

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
17.8 Cautions
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(1) When the clock supply to UARTCn is stopped (for example, in IDLE1, IDLE2, or STOP mode), the operation stops
(2) The RXDC1 and KR7 pins must not be used at the same time. To use the RXDC1 pin, do not use the KR7 pin. To
(3) Start up the UARTCn in the following sequence.
(4) Stop the UARTCn in the following sequence.
(5) In transmit mode (UCnCTL0.UCnPWR bit = 1 and UCnCTL0.UCnTXE bit = 1), do not overwrite the same value to
(6) In continuous transmission, the communication rate from the stop bit to the next start bit is extended 2 base clocks
<1> Set the UCnCTL0.UCnPWR bit to 1.
<2> Set the ports.
<3> Set the UCnCTL0.UCnTXE bit to 1, UCnCTL0.UCnRXE bit to 1.
<1> Set the UCnCTL0.UCnTXE bit to 0, UCnCTL0.UCnRXE bit to 0.
<2> Set the ports and set the UCnCTL0.UCnPWR bit to 0 (it is not a problem if port setting is not changed).
the UCnTX register by software because transmission starts by writing to this register. To transmit the same value
continuously, overwrite the same value.
more than usual. However, the reception side initializes the timing by detecting the start bit, so the reception result
is not affected.
with each register retaining the value it had immediately before the clock supply was stopped. The TXDCn pin
output also holds and outputs the value it had immediately before the clock supply was stopped. However, the
operation is not guaranteed after the clock supply is resumed. Therefore, after the clock supply is resumed, the
circuits should be initialized by setting the UCnCTL0.UCnPWR, UCnCTL0.UCnRXEn, and UCnCTL0.UCnTXEn
bits to 000.
use the KR7 pin, do not use the RXDC1 pin (it is recommended to set the PFC91 bit to 1 and clear PFCE91 bit to
0).
CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC)
Page 761 of 1509