UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 364
UPD70F3765GF-GAT-AX
Manufacturer Part Number
UPD70F3765GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet
1.UPD70F3760GC-UEU-AX.pdf
(1512 pages)
Specifications of UPD70F3765GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3765GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(1) External event count mode operation flow
Remark
<1> Count operation start flow
<2> Count operation stop flow
INTTABnCC0 signal
TABnCCR0 register
(TABnCKS0 to TABnCKS2 bits)
n = 0, 1
Figure 8-12. Flow of Software Processing in External Event Count Mode
Register initial setting
16-bit counter
TABnCTL1 register,
TABnIOC0 register,
TABnIOC2 register,
TABnCCR0 register
TABnCTL0 register
TABnCE bit
TABnCE bit = 1
TABnCE bit = 0
START
FFFFH
STOP
0000H
<1>
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
D
The initial setting of these registers
is performed before setting the
TABnCE bit to 1.
The TABnCKS0 to TABnCKS2 bits can
be set at the same time when counting
has been started (TABnCE bit = 1).
The counter is initialized and counting
is stopped by clearing the TABnCE bit to 0.
0
D
0
D
0
D
0
<2>
Page 364 of 1509
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