UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 917

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(b) Resynchronization
Synchronization is established again if a level change is detected on the bus during reception (only if a
recessive level was sampled previously).
• The phase error of the edge is given by the relative position of the detected edge and sync segment.
• The sample point of the data of the receiving node moves relatively due to the “discrepancy” in the baud
<Sign of phase error>
0: If the edge is within the sync segment
Positive: If the edge is before the sample point (phase error)
Negative: If the edge is after the sample point (phase error)
If phase error is positive: Phase segment 1 is longer by specified SJW.
If phase error is negative: Phase segment 2 is shorter by specified SJW.
rate between the transmitting node and receiving node.
Bit timing
CAN bus
CAN bus
Bit timing
Sync
segment
Sync
segment
Figure 20-21. Resynchronization
Prop
segment
Prop
segment
If phase error is positive
If phase error is negative
Phase segment 1
Phase segment 1
Sample point
Phase
segment 2
Sample point
CHAPTER 20 CAN CONTROLLER
Phase
segment 2
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