UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 324

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UPD70F3765GF-GAT-AX

Manufacturer Part Number
UPD70F3765GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3765GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3765GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
The operation of each pin and signal when TAA1 and TAA0 are connected in cascade is shown below.
TIAA10 pin input
TIAA11 pin input
INTTAA1CCR0 interrupt signal
INTTAA1CCR1 interrupt signal
INTTAA1OV interrupt signal
TIAA00 pin input
TIAA01 pin input
INTTAA0CCR0 interrupt signal
INTTAA0CCR1 interrupt signal
INTTAA0OV interrupt signal
Name
Higher/Lower
Higher
Higher
Higher
Higher
Higher
Lower
Lower
Lower
Lower
Lower
Table 7-12. Status in Cascade Connection
Capture input 0
Capture input 1
Capture interrupt 0
Capture interrupt 1
Overflow interrupt
Capture input 0
Capture input 1
Capture interrupt 0
Capture interrupt 1
Overflow interrupt
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
Function
The value of the lower timer counter is stored in the
TAA1CCR0 register and the value of the higher timer
counter is stored in the TAA0CCR0 register when the
valid edge of this input is detected.
The value of the lower timer counter is stored in the
TAA1CCR1 register and the value of the higher timer
counter is stored in the TAA0CCR1 register when the
valid edge of this input is detected.
This interrupt is generated when the valid edge of the
TIAA10 pin is detected.
This interrupt is generated when the valid edge of the
TIAA11 pin is detected.
This interrupt is generated when an overflow of the
lower timer counter is detected.
Does not operate.
Does not operate.
Does not operate.
Does not operate.
This interrupt is generated when an overflow of the
higher timer counter is detected.
Operation
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