UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 412

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
Figure 8-33. Software Processing Flow in Free-Running Timer Mode (Capture Function) (2/2)
Remark
n = 0, 1
<1> Count operation start flow
<2> Overflow flag clear flow
<3> Count operation stop flow
(TABnCKS0 to TABnCKS2 bits),
TABnOVF bit (CLR TABnOVF).
Execute instruction to clear
Read TABnOPT0 register
Register initial setting
(check overflow flag).
TABnCTL1 register,
TABnIOC1 register,
TABnOPT0 register
TABnCTL0 register
TABnOVF bit = 1
TABnCE bit = 0
TABnCE bit = 1
START
STOP
YES
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
NO
The counter is initialized and
counting is stopped by
clearing the TABnCE bit to 0.
The initial setting of these registers
is performed before setting the
TABnCE bit to 1.
The TABnCKS0 to TABnCKS2 bits can
be set at the same time when counting
has been started (TABnCE bit = 1).
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