UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 710

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(10) Standby mode
(11) High-speed conversion mode
(12) A/D conversion time
(13) Variation of A/D conversion results
(14) A/D conversion result hysteresis characteristics
Because the A/D converter stops operating in the STOP mode, the conversion results are invalid, so power
consumption can be reduced. Operations are resumed after the STOP mode is released, but the A/D conversion
results after the STOP mode is released are invalid. When using the A/D converter after the STOP mode is
released, clear the ADA0M0.ADA0CE bit to 0 before setting the STOP mode or after releasing the STOP mode,
then set the ADA0CE bit to 1 after releasing the STOP mode.
In the IDLE1, IDLE2, or subclock operation mode, operation continues. To lower the power consumption,
therefore, clear the ADA0M0.ADA0CE bit to 0. In the IDLE1 and IDLE2 modes, since the analog input voltage
value cannot be retained, the A/D conversion results after the IDLE1 and IDLE2 modes are released are invalid.
The results of conversions before the IDLE1 and IDLE2 modes were set are valid.
In the high-speed conversion mode, rewriting the ADA0M0, ADA0M2, ADA0S, ADA0PFM, and ADA0PFT
registers and trigger input during the stabilization time are prohibited.
The A/D conversion time is the total of the stabilization time, conversion time, wait time, and trigger response time
(for details of these times, refer to Table 15-2 Conversion Time Selection in Normal Conversion Mode
(ADA0HS1 Bit = 0) and Table 15-3 Conversion Time Selection in High-Speed Conversion Mode (ADA0HS1
Bit = 1)).
During A/D conversion in the normal conversion mode, if the ADA0M0, ADA0M2, ADA0S, ADA0PFM, and
ADA0PFT registers are written or a trigger is input, reconversion is carried out. However, if the stabilization time
end timing conflicts with writing to these registers, or if the stabilization time end timing conflicts with the trigger
input, a stabilization time of 64 clocks is reinserted.
If a conflict occurs again with the reinserted stabilization time end timing, the stabilization time is reinserted.
Therefore do not set the trigger input interval and control register write interval to 64 clocks or lower.
The results of A/D conversion may vary due to a fluctuation in the supply voltage or the effect of noise. To reduce
this variation, take countermeasures with the program such as averaging the A/D conversion results.
The successive comparison type A/D converter holds the analog input voltage in the internal sample & hold
capacitor and then performs A/D conversion. After A/D conversion has finished, the analog input voltage remains
in the internal sample & hold capacitor. As a result, the following phenomena may occur.
• When the same channel is used for A/D conversions, if the voltage is higher or lower than the previous A/D
• When switching the analog input channel, hysteresis characteristics may appear in which the conversion result
conversion, then hysteresis characteristics may appear in which the conversion result is affected by the
previous value. Thus, even if the conversion is performed at the same potential, the result may vary.
is affected by the previous channel value. This is because one A/D converter is used for the A/D conversions.
Thus, even if the conversion is performed at the same potential, the result may vary.
CHAPTER 15 A/D CONVERTER
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