UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 304

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
later detected, the count value of the 16-bit counter is stored in the TAAnCCRm register, the 16-bit counter is cleared to
0000H, and a capture interrupt request signal (INTTAAnCCm) is generated.
request signal (INTTAAnOV) is generated at the next count clock, and the counter is cleared to 0000H and continues
counting. At this time, the overflow flag (TAAnOPT0.TAAnOVF bit) is also set to 1. Clear the overflow flag to 0 by
executing the CLR instruction via software.
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
When the TAAnCE bit is set to 1, the 16-bit counter starts counting. When the valid edge input to the TIAAnm pin is
The pulse width is calculated as follows.
If the valid edge is not input to the TIAAnm pin even when the 16-bit counter counted up to FFFFH, an overflow interrupt
If the overflow flag is set to 1, the pulse width can be calculated as follows.
Remark
Pulse width = Captured value × Count clock cycle
Pulse width = (10000H × TAAnOVF bit set (1) count + Captured value) × Count clock cycle
INTTAAnCCm signal
TAAnCCRm register
Remark
INTTAAnOV signal
n = 0 to 3, 5
m = 0, 1
TIAAnm pin input
16-bit counter
TAAnOVF bit
TAAnCE bit
n = 0 to 3, 5
m = 0, 1
FFFFH
0000H
Figure 7-40. Basic Timing in Pulse Width Measurement Mode
0000H
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
D
0
D
1
Cleared to 0 by
CLR instruction
D
2
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D
3