UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 989

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UPD70F3765GF-GAT-AX

Manufacturer Part Number
UPD70F3765GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3765GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3765GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
20.9.6 Remote frame reception
searched from all the message buffers satisfying the following conditions.
the ID of a message buffer that satisfies the above conditions.
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
In all the operation modes, when a remote frame is received, the message buffer that is to store the remote frame is
Upon acceptance of a remote frame, the following actions are executed if the ID of the received remote frame matches
Caution When a message buffer is searched for receiving and storing a remote frame, overwrite control by
Remark
Used as a message buffer
(C0MCONFm.MA0 bit set to 1.)
Set as a transmit message buffer
(C0MCONFm.MT2 to C0MCONFm.MT0 bits set to 000B)
Ready for reception
(C0MCTRLm.RDY bit set to 1.)
Set to transmit message
(C0MCONFm.RTR bit is cleared to 0.)
Transmission request is not set.
(C0MCTRLm.TRQ bit is set to 0.)
The C0MDLCm.DLC3 to C0MDLCm.DLC0 bits store the received DLC value.
The C0MDATA0m to C0MDATA7m registers in the data area are not updated (data before reception is saved).
The C0MCTRLm.DN bit is set to 1.
The C0INTS.CINTS1 bit is set to 1 (if the C0MCTRLm.IE bit of the message buffer that receives and stores the
frame is set to 1).
The receive completion interrupt (INTC0REC) is output (if the IE bit of the message buffer that receives and stores
the frame is set to 1 and if the C0IE.CIE1 bit is set to 1).
The message buffer number is recorded in the receive history list.
the C0MCONFm.OWS bit of the message buffer and the DN bit are not affected. The setting of the
OWS bit is ignored and the DN bit is set to 1 in every case.
If more than one transmit message buffer has the same ID and the ID of the received remote frame
matches that ID, the remote frame is stored in the transmit message buffer with the lowest message
buffer number.
m = 00 to 31
CHAPTER 20 CAN CONTROLLER
Page 989 of 1509

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