UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 1174

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
21.6.8 Bulk-in register
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(1) UF0 EP1 bulk-in transfer data register (UF0EP1BI)
(2) UF0 EP3 bulk-in transfer data register (UF0EP3BI)
7 to 0
7 to 0
After reset: 0000H
UF0EP1BI
After reset: 0000H
UF0EP3BI
Bit position
Bit position
The UF0EP1BI register writes the bulk-in transfer data of EP1.
The UF0EP1BI register can be read or written in 8-bit or 16-bit units.
The UF0EP3BI register writes the bulk-in transfer data of EP1.
The UF0EP3BI register can be read or written in 8-bit or 16-bit units.
EP1BI7 to
EP1BI0
EP3BI7 to
EP3BI0
EP1BI7
EP3BI7
Bit name
Bit name
15
15
7
7
0
0
R/W
R/W
Address: 00201000H
Address: 00202000H
Writing the bulk-out transfer data of EP1.
Data outputting to the EPC macro by writing data to this register.
If using this register, setting the address (00201000H) in DMA destination address register
(DDAn (n = 0 to 3)) of DMAC. In addition, set the RQnUR1E (n = 0 to 3) bit of the UFDRQEN
register to 1 to assign a DMA channel.
Writing the bulk-out transfer data of EP3.
Data outputting to the EPC macro by writing data to this register.
If using this register, setting the address (00202000H) in DMA destination address register
(DDAn (n = 0 to 3)) of DMAC. In addition, set the RQnUR3E (n = 0 to 3) bit of the UFDRQEN
register to 1 to assign a DMA channel.
EP1BI6
EP3BI6
14
14
0
6
0
6
EP1BI5
EP3BI5
13
13
5
5
0
0
EP1BI4
EP3BI4
CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
12
12
4
4
0
0
EP1BI3
EP3BI3
Function
Function
11
11
0
3
0
3
EP1BI2
EP3BI2
10
10
2
2
0
0
EP1BI1
EP3BI1
9
0
1
9
0
1
Page 1174 of 1509
EP1BI0
EP3BI0
0
0
8
0
8
0